STMicroelectronics TD310ID
- Part No.:
- TD310ID
- Manufacturer:
- STMicroelectronics
- Category:
- Gate Drivers
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TD310ID.pdf
- Description:
- IC GATE DRVR LOW-SIDE 16SO
- Quantity:
- Payment:

- Shipping:

Inventory:1,489
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Product details
Overview
TD310ID from STMicroelectronics is a triple-channel IGBT/MOSFET gate driver with integrated current-sense comparator, uncommitted op-amp, programmable UVLO, and standby mode. It delivers 0.6 A peak output per channel, supports 4–16 V single-supply operation, and features low 7 Ω output impedance at 200 mA - enabling robust low-side or half-bridge drive in three-phase motor control systems.
For engineers reviewing the TD310ID datasheet, TD310ID pinout, TD310ID application, or TD310ID equivalent, key selection considerations include its triple-channel timing matching (≤20 ns differential delay), sense-input hysteresis (40 mV), alarm output response (<500 ns), and SO-16 package compatibility with high-density PCB layouts.
Technical Context
The TD310ID integrates three independent gate drivers with matched propagation delays (200–400 ns), a dedicated current-sense comparator with 1 ms inhibition time and 300 ns sense input delay, and a rail-to-rail op-amp (GBP = 1 MHz, SR = 0.6 V/µs) usable for shunt-based current amplification prior to MCU ADC sampling.
Its UVLO threshold is externally adjustable via resistor divider on Pin 16, with default internal thresholds of 10.7–13.3 V and hysteresis of 0.8 V; standby mode activates below 0.3–1.1 V on the same pin, reducing supply current from 1.5 mA to 30 µA while forcing outputs low and disabling the op-amp.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Drive | 0.6 A peak per channel - sufficient to charge/discharge IGBT/MOS gates in <1 µs pulses at 1% duty cycle |
| Supply Range | 4–16 V single supply - supports wide-bus industrial systems without external regulation |
| Differential Delay | ≤20 ns between channels - ensures synchronized switching in three-phase inverters |
| Sense Hysteresis | 40 mV - prevents false overcurrent triggering during noisy transient conditions |
| Op-Amp GBP | 1 MHz - enables stable closed-loop current sensing up to ~10 kHz bandwidth |
| UVLO Threshold | Adjustable 10–15 V range - configurable protection against brown-out in variable-line applications |
| Standby Current | 30 µA - enables ultra-low-power sleep states in battery-backed or energy-sensitive systems |
Pinout & Package
TD310ID is housed in a 16-pin plastic SO (Small Outline) micropackage (SO-16), measuring 9.8 × 5.8 mm with 1.27 mm pitch, optimized for automated assembly and thermal performance in compact motor drives.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (Pin 1) | Positive supply input | Must be decoupled with ≥1 µF capacitor; powers all drivers, comparator, and op-amp |
| INA/INB/INC (Pins 2/3/4) | Inverting logic inputs | CMOS/LSTTL-compatible with hysteresis; control OUTA/OUTB/OUTC independently |
| Enable (Pin 5) | Global output enable | Low disables all three drivers; overrides individual inputs |
| Alarm (Pin 6) | Open-collector fault indicator | Sinks up to 35 mA when sense comparator triggers overcurrent |
| OA Output (Pin 7) | Op-amp output | Rail-to-rail capable; used for current signal conditioning before MCU ADC |
| OA+ / OA− (Pins 8/9) | Op-amp differential inputs | Support shunt-based current measurement with 10 mV offset and 0–VCC−1.5 V common-mode range |
| GND (Pin 10) | Power and signal reference | Shared return for drivers, comparator, op-amp, and sense circuitry |
| OUTC/OUTB/OUTA (Pins 11/12/13) | Driver outputs | Low-impedance (7 Ω typ.) push-pull stages; each sources 0.6 A peak, sinks 0.6 A peak |
| Sense+ / Sense− (Pins 14/15) | Current-sense comparator inputs | Detect overcurrent via external shunt; 20 mV offset, 40 mV hysteresis, 1 ms inhibition latency |
| UVLO/Stby (Pin 16) | Supply monitoring & power mode control | Configures UVLO threshold (via external divider) and enters 30 µA standby when pulled <1.1 V |
Key Features
| Feature | Design Value |
|---|---|
| Triple-channel synchronization | ≤20 ns inter-channel delay ensures balanced phase timing in 3-phase inverters |
| Integrated current protection | Dedicated comparator with 1 ms blanking and 500 ns alarm assertion enables fast fault shutdown |
| Configurable power management | Single pin (Pin 16) controls both UVLO level and entry into 30 µA standby mode |
| On-chip signal conditioning | Uncommitted op-amp with 1 MHz GBP and 0.6 V/µs slew rate supports precision shunt amplification |
| Robust logic interface | Hysteresis on all inputs rejects noise in industrial EMI environments without external Schmitt triggers |
Applications
| Three-Phase Motor Drive | Pulse Transformer Interface |
|---|---|
Use Scenario: Driving low-side IGBTs in a 3-phase inverter for HVAC compressors or industrial pumps. IC Role / Device Role / Timing Role: Triple gate driver synchronizing phase-leg switching with ≤20 ns skew; current sense protects against short-circuit faults. Use Value: Eliminates need for three discrete drivers and external comparator, reducing BOM count and layout area by >40%. | Use Scenario: Isolating control signals to high-voltage gate drivers using pulse transformers in SMPS or UPS systems. IC Role / Device Role / Timing Role: Provides high-current, fast-rise pulses (0.6 A peak) to saturate transformer primary windings reliably. Use Value: Ensures clean magnetization/demagnetization cycles with <2 V demag drop at 100 mA, minimizing core loss. |
| Industrial Low-Side Switching | Programmable Power Stage Control |
Use Scenario: Controlling multiple MOSFETs in PLC output modules or solid-state relays. IC Role / Device Role / Timing Role: Gate driver with enable pin and alarm feedback for centralized fault handling across parallel loads. Use Value: Enables coordinated shutdown of all channels within 600 ns of sense trigger, meeting SIL-2 functional safety timing. | Use Scenario: Adaptive power stage tuning in servo drives where UVLO threshold must match varying DC bus levels. IC Role / Device Role / Timing Role: Programmable UVLO (via Pin 16 resistor network) and standby mode support dynamic supply adaptation. Use Value: Allows single hardware design to operate across 48 V, 72 V, and 100 V DC bus variants without component change. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar triple-channel gate driver with current sense applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IRS21844SPbF | Half-bridge dual-channel (not triple); no integrated op-amp or programmable UVLO | Requires external comparator and voltage monitor for overcurrent and brown-out protection | Preferred when only two gate drives needed and board space allows discrete support components |
| UCC27324DR | Single-channel, 4 A peak; no current sense, UVLO, or op-amp - purely a driver | Needs full external protection and signal conditioning circuitry for equivalent functionality | Selected for ultra-high-speed, high-current single-switch applications where integration is secondary to speed |
Compared with IRS21844SPbF and UCC27324DR, TD310ID uniquely consolidates triple drive, current sensing, op-amp, and programmable power management in one SO-16 package - reducing system-level component count and improving timing consistency across phases.
Availability
TD310ID is available at Aetrix Electronics and suitable for three-phase motor drives, pulse transformer interfaces, and industrial low-side switching applications requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for TD310ID includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, microcontroller, power, and sensor solutions for industrial, automotive, and consumer markets.
The TD310 belongs to ST's high-voltage intelligent power driver product line, engineered specifically for integrated gate driving and real-time fault protection in motor control and power conversion systems.
FAQ
What is the maximum allowable pulse width for 0.6 A peak output current?
The TD310ID supports 0.6 A peak output only in pulsed mode: maximum pulse width is 1 µs with ≤1% duty cycle at ambient temperature. Continuous DC current capability is limited to 200 mA per channel to maintain safe junction temperature and avoid thermal shutdown.
Can the op-amp be used in closed-loop current sensing without external compensation?
Yes - the TD310ID's op-amp has internal compensation and unity-gain stability. With RL = 100 kΩ and CL = 100 pF, it achieves 0.6 V/µs slew rate and 1 MHz gain-bandwidth product, enabling direct use in shunt-amplifier configurations feeding standard 12-bit MCU ADCs without added compensation networks.
How does the UVLO/Stby pin behave when left floating?
The UVLO/Stby pin must never be left floating. If unconnected, internal leakage may cause erratic mode transitions. ST recommends either connecting it to VCC via a 150 kΩ pull-up to disable UVLO/standby, or using an external resistor divider to set precise thresholds - with external resistors ≤10 kΩ to minimize error from internal 140 kΩ/1.26 MΩ tolerance.
Is channel paralleling supported, and what is required to implement it?
Yes - TD310ID supports channel paralleling (e.g., combining OUTA and OUTB) to double peak current drive. To implement: tie corresponding inputs (INA=INB), outputs (OUTA=OUTB), and sense inputs (Sense+=Sense− shared); ensure identical PCB trace lengths and thermal coupling; derate total current by 15% for thermal margin due to mismatch in Vdem and Ropd.
TD310ID Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Independent
- Number of Drivers:
- 3
- Gate Type:
- IGBT, N-Channel MOSFET
- Voltage - Supply:
- 4V ~ 16V
- Logic Voltage - VIL, VIH:
- 0.8V, 2V
- Current - Peak Output (Source, Sink):
- -
- Input Type:
- Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- -
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SO
TD310ID FAQ
1.How can I place an order for TD310ID through Aetrix?
Please submit a Request for Quotation (RFQ) for TD310ID on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TD310ID reliable?
The price and inventory of TD310ID are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TD310ID is usually 5 days.
3.What payment methods are accepted for TD310ID?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TD310ID transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TD310ID?
TD310ID orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TD310ID order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TD310ID?
For technical support, including TD310ID datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TD310ID requirements.
6.How does Aetrix verify that TD310ID is sourced from the original manufacturer or authorized distributors?
All TD310ID products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TD310ID meets industry standards.
7.What is the process for return or replacement of TD310ID?
All TD310ID units undergo pre-shipment inspection (PSI). If there is an issue with TD310ID, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TD310ID part is unused and in its original packaging.
Return procedure for TD310ID:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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