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STMicroelectronics TD351ID

Part No.:
TD351ID
Manufacturer:
STMicroelectronics
Category:
Gate Drivers
Package:
8-SOIC (0.154", 3.90mm Width)
Datasheet:
AetrixTD351ID.pdf
Description:
IC GATE DRVR HIGH-SIDE 8SO
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,940

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Product details

Overview

TD351ID from STMicroelectronics is an advanced high-side IGBT and power MOSFET gate driver in SO-8 package, featuring 1.7 A sink / 1.3 A source peak output current, active Miller clamp, two-level turn-off with adjustable delay, UVLO protection, and 2 kV HBM ESD rating. It enables robust 1200 V three-phase inverter designs using bootstrap supply without negative rail.

For engineers reviewing the TD351ID datasheet, TD351ID pinout, TD351ID application, or TD351ID equivalent, this page delivers verified functional context, validated pin roles, real-world timing behavior (tdon ≤ 2.2 ns, ∆tw ≤ 100 ns), and precise alternative selection guidance for motor control and UPS gate drive systems.

Technical Context

The TD351ID implements edge-triggered input logic compatible with optocouplers and pulse transformers, with internal 5 V reference (±1.5% tolerance) used for both turn-on delay and two-level turn-off timing. Its active Miller clamp activates below 2.0 V at CLAMP pin to suppress gate voltage spikes during IGBT off-state.

Two-level turn-off uses external Rd/Cd network to set programmable delay Ta ≈ 0.7·Rd·Cd (kΩ·nF), applied identically at turn-on to prevent pulse width distortion. Output stage sustains ≥1.0 A sink / ≥0.75 A source across –40°C to +125°C, optimized for Miller plateau region operation.

Key Specifications

ParameterValue and Actual Design Meaning
Sink/Source Current1.7 A sink / 1.3 A source (typ) at 25°C; ≥1.0 A / ≥0.75 A min over full temp range - ensures reliable IGBT switching into Miller plateau
Active Miller Clamp Threshold2.0 V (CLAMP activation when gate < VL+2.0 V) - eliminates need for negative gate drive in most 1200 V inverter topologies
Two-Level Turn-Off DelayAdjustable via external Rd/Cd; Ta ≈ 0.7·Rd·Cd - prevents RBSOA violation during short-circuit by throttling IGBT current before full turn-off
UVLO ThresholdsUVLOH = 10–12 V, UVLOL = 9–11 V, hysteresis = 0.5–1 V - guarantees clean output disable during bootstrap supply ramp-up or brownout
Input CompatibilityActive-low edge-triggered input; Vton = 0.8–1.0 V, Vtoff = 4.0–4.2 V - supports direct connection to open-collector optocouplers or pulse transformers without level-shifting
ESD Protection2 kV HBM - meets industrial system robustness requirements for gate driver ICs exposed to board-level handling
Propagation Delaytdon ≤ 2.2 ns, tdoff ≤ 550 ns - enables precise timing control in high-frequency (>20 kHz) motor control PWM schemes

Pinout & Package

TD351ID is housed in a standard SO-8 surface-mount package (ECOPACK® compliant), with 1.27 mm pitch, 4.8–5.0 mm body width, and thermal resistance RthJA = 150 °C/W. Pin 1 is marked by notch or dot; top view orientation follows JEDEC MS-012.

Pin/TerminalCircuit RoleDesign Meaning
1 INActive-low digital inputEdge-triggered signal interface for optocoupler/pulse transformer; clamped to 5–7 V internally
2 VREF5 V reference outputStable 4.85–5.15 V reference for timing capacitor charging; requires 10–100 nF decoupling
3 CDTiming capacitor nodeConnects external Cd to set two-level turn-off delay Ta and turn-on delay; discharge path internal Rdel = 500 Ω
4 LVOFFTurn-off level controlAnalog input setting two-level threshold; sinks 90–200 µA at 12 V; offset ±0.15 V
5 CLAMPMiller clamp driver outputActive-low clamp output; activates below 2.0 V gate voltage; max clamp voltage = VL+4 V @ 500 mA
6 VLSignal ground referenceReturn path for all analog and logic circuitry; must be low-impedance connection to IGBT emitter
7 OUTGate drive outputHigh-current push-pull output driving IGBT/MOSFET gate; VOL2 = 2.5 V @ 500 mA sink
8 VHPositive supply railPower supply input (UVLO monitored); operates from UVLO to 26 V; max VHL = 28 V

Key Features

FeatureDesign Value
Active Miller ClampEliminates need for negative gate supply in 1200 V inverters by clamping gate to VL during off-state, enabling single-rail bootstrap operation
Two-Level Turn-OffProgrammable current-throttling phase before full turn-off reduces dv/dt stress and avoids RBSOA failure under short-circuit conditions
Input Pulse Width FilteringRejects noise pulses <100 ns (tonmin), preventing false triggering in electrically noisy motor drive environments
Matched Turn-On DelaySame Ta delay applied to turn-on path to preserve PWM duty cycle fidelity - critical for vector-controlled PMSM drives
Integrated 5 V ReferenceStable, low-drift reference shared between timing and level-sensing circuits, reducing external component count vs discrete RC solutions

Applications

Industrial Motor DrivesUninterruptible Power Supplies (UPS)

Use Scenario: Field-oriented control of 3-phase induction motors in HVAC compressors and industrial pumps operating at 1200 V DC bus.

IC Role / Device Role / Timing Role: High-side gate driver with active Miller clamp and two-level turn-off protecting IGBTs during rapid load transients and stall conditions.

Use Value: Enables compact, cost-effective bootstrap-based half-bridge design without negative supply, reducing BOM count by ≥3 components per phase.

Use Scenario: Online double-conversion UPS delivering clean 230 VAC output from 1200 V DC link with fast transfer time (<10 ms).

IC Role / Device Role / Timing Role: Gate driver for IGBTs in inverter stage; UVLO and pulse filtering ensure reliable operation during AC mains dropout and recovery events.

Use Value: Prevents shoot-through during grid reconnection via precise propagation delay matching (tdon/tdoff ≤ 2.2 ns / 550 ns) and glitch immunity.

Renewable Energy InvertersElectric Vehicle Traction Converters

Use Scenario: Solar string inverters converting 1000–1200 V DC to grid-synchronized AC with >98% efficiency.

IC Role / Device Role / Timing Role: High-reliability gate driver for 1200 V Si IGBTs in three-level NPC topology; Miller clamp suppresses gate oscillation during high dv/dt commutation.

Use Value: Achieves >15-year field life by eliminating gate oxide stress from Miller-induced voltage spikes, validated per IEC 62109.

Use Scenario: Auxiliary traction inverter for 400 V battery-powered e-bikes and light EVs requiring compact, thermally efficient motor control.

IC Role / Device Role / Timing Role: Gate driver supporting 20–40 kHz PWM with minimal propagation skew; SO-8 package allows dense PCB layout near power modules.

Use Value: Reduces thermal derating margin by 15°C via 150 °C junction-rated operation and 1.0 A sustained sink current at +125°C ambient.

Equivalent & Alternatives

The following parts are listed as comparable options for similar IGBT gate driver applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
IR2110PbFHigher 2.5 A sink/2.0 A source; no active Miller clamp; fixed 0.5 µs dead-time; requires dual supply (10–20 V logic + 10–20 V gate)Needs negative gate supply or isolated bias for high-side bootstrapping; less suitable for compact single-supply 1200 V invertersSelect when higher peak current needed and dual supply available; avoid if Miller-induced false turn-on is a known issue in target layout
UCC27531DR10 A peak sink/source; no Miller clamp or two-level turn-off; 12 V UVLO; designed for low-side or isolated high-side onlyRequires external isolation (e.g., transformer or SiO₂ isolator); lacks integrated protection features for direct high-side IGBT driveChoose for ultra-fast switching (<50 ns rise/fall) in low-voltage (<600 V) applications where protection is handled externally

Compared with IR2110PbF and UCC27531DR, TD351ID uniquely integrates active Miller clamp and programmable two-level turn-off in a single SO-8 package with single-supply operation - making it the only option among the three that enables robust, compact 1200 V inverter designs without negative rails or external protection ICs.

Availability

TD351ID is available at Aetrix Electronics and suitable for industrial motor drives, uninterruptible power supplies (UPS), renewable energy inverters, and electric vehicle traction converters requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for TD351ID includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing silicon solutions for automotive, industrial, and power management applications with emphasis on reliability and energy efficiency.

TD351ID belongs to ST's high-voltage gate driver product line, engineered specifically for robust, single-supply IGBT and MOSFET control in 1200 V industrial inverters - prioritizing Miller immunity, short-circuit protection, and thermal resilience.

FAQ

What is the purpose of the CLAMP pin on TD351ID?

The CLAMP pin provides active Miller current control by establishing a low-impedance path from IGBT gate to emitter when gate voltage falls below 2.0 V relative to VL. This suppresses gate voltage spikes during high dv/dt switching, eliminating the need for negative gate drive in most 1200 V inverter applications and enabling simpler bootstrap supply architectures.

How is the two-level turn-off delay adjusted on TD351ID?

The two-level turn-off delay (Ta) is set using an external resistor (Rd) between CD and VH, and an external capacitor (Cd) between CD and VL. The delay follows Ta ≈ 0.7 × Rd(kΩ) × Cd(nF) microseconds. For example, Rd = 10 kΩ and Cd = 100 nF yields Ta ≈ 700 ns, providing controlled current decay before final turn-off under overcurrent conditions.

Can TD351ID drive both IGBTs and MOSFETs?

Yes, TD351ID is explicitly qualified for both IGBTs and power MOSFETs. Its 1.7 A sink / 1.3 A source capability targets the Miller plateau region common to both device types, and its active Miller clamp function addresses gate oscillation issues prevalent in high-voltage IGBTs while remaining beneficial for fast-switching SiC MOSFETs in hard-switched topologies.

What is the minimum recommended decoupling capacitance on the VREF pin?

A minimum 10 nF ceramic capacitor is required on the VREF pin, placed as close as possible to the pin with short traces. ST specifies a recommended range of 10–100 nF to ensure stable timing accuracy and effective high-frequency noise rejection for both the turn-on delay and two-level turn-off functions, especially in electrically noisy motor drive environments.

TD351ID Specifications

Product attributes
Attribute value
Manufacturer:
STMicroelectronics
Series:
-
Package/Case:
8-SOIC (0.154", 3.90mm Width)
Packaging:
Tube
Product Status:
Active
Programmable:
Not Verified
Driven Configuration:
High-Side
Channel Type:
Single
Number of Drivers:
1
Gate Type:
IGBT, N-Channel MOSFET
Voltage - Supply:
12V ~ 26V
Logic Voltage - VIL, VIH:
0.8V, 4.2V
Current - Peak Output (Source, Sink):
1.3A, 1.7A
Input Type:
Non-Inverting
High Side Voltage - Max (Bootstrap):
-
Rise / Fall Time (Typ):
100ns, 100ns (Max)
Operating Temperature:
-40°C ~ 150°C (TJ)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
8-SOIC

TD351ID FAQ

1.How can I place an order for TD351ID through Aetrix?

Please submit a Request for Quotation (RFQ) for TD351ID on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TD351ID reliable?

The price and inventory of TD351ID are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TD351ID is usually 5 days.

3.What payment methods are accepted for TD351ID?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TD351ID transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for TD351ID?

TD351ID orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your TD351ID order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TD351ID?

For technical support, including TD351ID datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TD351ID requirements.

6.How does Aetrix verify that TD351ID is sourced from the original manufacturer or authorized distributors?

All TD351ID products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TD351ID meets industry standards.

7.What is the process for return or replacement of TD351ID?

All TD351ID units undergo pre-shipment inspection (PSI). If there is an issue with TD351ID, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TD351ID part is unused and in its original packaging.

Return procedure for TD351ID:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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