STMicroelectronics TD351IDT

Overview

TD351IDT from STMicroelectronics is an advanced high-side IGBT and power MOSFET gate driver in SO-8 package, featuring 1.7 A sink / 1.3 A source typical output current, active Miller clamp, two-level turn-off with adjustable delay, UVLO protection, and 2 kV HBM ESD rating. It enables robust 1200 V three-phase inverter designs using bootstrap supply without negative rail.

For engineers reviewing the TD351IDT datasheet, TD351IDT pinout, TD351IDT application, or TD351IDT equivalent, key selection criteria include Miller clamp threshold (2.0 V), two-level turn-off programmability via CD/LVOFF pins, input compatibility with optocouplers and pulse transformers, and thermal performance up to +125°C junction temperature.

Technical Context

The TD351IDT implements a dedicated active Miller clamp circuit that activates when gate voltage falls below 2.0 V relative to VL, clamping with ≤2.5 V low-state voltage at 500 mA sink, eliminating need for negative gate drive in most IGBT applications. Its two-level turn-off uses external Rd/Cd network to set delay (Ta ≈ 0.7 × Rd × Cd) and programmable off-level via LVOFF pin.

Input stage accepts edge-triggered signals from optocouplers (pull-up to VREF or VH) or pulse transformers, with 100–220 ns minimum input pulse width filtering. Output stage delivers full-current drive near Miller plateau region, with UVLO thresholds of 9–12 V (hysteresis 0.5–1 V) and quiescent current of 2.5 mA at no load.

Key Specifications

Pinout & Package

TD351IDT is housed in a standard SO-8 surface-mount package (ECOPACK® compliant), with 1.27 mm pitch, 4.8–5.0 mm body width, and 150 °C/W thermal resistance junction-to-ambient.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar IGBT gate driver applications.

Compared with IR2110PbF and UCC21520DW, TD351IDT uniquely combines bootstrap-compatible active Miller clamping, fully programmable two-level turn-off, and SO-8 integration-making it optimal for cost-sensitive, high-reliability 1200 V IGBT inverters where space and supply simplicity are critical.

Availability

TD351IDT is available at Aetrix Electronics and suitable for industrial motor drives, uninterruptible power supplies, solar inverters, and electric vehicle onboard chargers requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for TD351IDT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and automotive-grade components with focus on energy efficiency and industrial reliability.

The TD351 belongs to ST's high-voltage gate driver product line, engineered specifically for ruggedized IGBT control in 1200 V industrial inverters-emphasizing fault resilience, Miller immunity, and single-supply operability.

FAQ

What is the purpose of the CLAMP pin on TD351IDT?

The CLAMP pin provides active Miller current control by establishing a low-impedance path between the IGBT gate and emitter during OFF-time. It activates when gate voltage drops below 2.0 V relative to VL, clamping at ≤2.5 V with up to 500 mA sink capability. This prevents parasitic turn-on without requiring negative gate voltage, enabling reliable bootstrap-based high-side drive in 1200 V inverters.

How is the two-level turn-off delay programmed on TD351IDT?

The two-level turn-off delay (Ta) is set using an external resistor (Rd) between CD and VH, and capacitor (Cd) between CD and VL. The approximate delay is Ta = 0.7 × Rd(kΩ) × Cd(nF) microseconds. This same delay applies to input signal propagation to prevent pulse width distortion. LVOFF pin voltage determines the intermediate turn-off voltage level, with 90–200 µA sink current defining its sensitivity.

Can TD351IDT drive SiC MOSFETs effectively?

TD351IDT is optimized for IGBTs and silicon MOSFETs-not SiC MOSFETs. Its 100 ns rise/fall times and 1.7 A/1.3 A drive strength meet typical IGBT Miller plateau requirements, but SiC devices demand faster switching, lower gate charge drive impedance, and tighter timing control. While functional in low-frequency SiC applications, ST does not characterize or guarantee performance for SiC, and dedicated SiC drivers like STGAP2S are recommended for full-spec operation.

What is the recommended decoupling for the VREF pin?

A ceramic decoupling capacitor of 10 nF to 100 nF must be placed directly between VREF and VL pins, as specified in ST's datasheet Section 5.2. This capacitor stabilizes the internal 5.0 V reference, filters noise from timing circuits, and ensures accurate delay generation for both two-level turn-off and input pulse filtering. X7R or C0G dielectrics are preferred for temperature stability and low ESR.