STMicroelectronics TD352ID
- Part No.:
- TD352ID
- Manufacturer:
- STMicroelectronics
- Category:
- Gate Drivers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TD352ID.pdf
- Description:
- IC GATE DRVR HIGH-SIDE 8SO
- Quantity:
- Payment:

- Shipping:

Inventory:1,371
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TD352ID from STMicroelectronics is an advanced high-side/low-side IGBT and MOSFET gate driver in SO-8 package, featuring 1.7 A sink / 1.3 A source peak output current, active Miller clamp, desaturation detection, adjustable turn-on delay (programmable via external R/C), and UVLO protection. It enables robust 1200 V three-phase inverter designs with bootstrap high-side supply.
For engineers reviewing the TD352ID datasheet, TD352ID pinout, TD352ID application, or TD352ID equivalent, key selection criteria include Miller clamp threshold (2.0 V), desaturation trip point (VH − 2 V), turn-on delay accuracy (±10% typical), and SO-8 thermal resistance (150 °C/W) for motor control and UPS systems.
Technical Context
The TD352ID integrates a dedicated active Miller clamp circuit that sinks up to 500 mA at VL+4 V max to suppress gate voltage spikes during IGBT off-state, eliminating need for negative gate drive. Its desaturation protection uses an internal 250 µA current source and external capacitor to set blanking time (e.g., ~0.056 µs/pF at VH = 16 V).
Turn-on delay is generated by charging an external capacitor CD through an internal 500 Ω discharge resistor (Rdel), yielding Ta ≈ 0.7 × Rd(kΩ) × Cd(nF); UVLO has 1 V hysteresis (10–11 V trip range) and forces OUT low during undervoltage, while VREF provides a stable 5.0 V ±0.15 V reference for timing and noise rejection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Sink/Source Current | 1.7 A sink / 1.3 A source (typ) at 25°C - drives IGBT gates through Miller plateau with margin |
| Miller Clamp Threshold | 2.0 V - triggers clamp when gate falls below this level relative to VL, suppressing false turn-on |
| Desat Trip Voltage | VH − 2 V - detects IGBT saturation loss at system voltage minus 2 V, enabling fast fault shutdown |
| Turn-on Delay Range | Programmable from ns to µs via Rd/Cd - sets reliable deadtime between half-bridge legs |
| UVLO Threshold | 10 V (top), 9 V (bottom), 1 V hysteresis - prevents erratic switching during brown-out or startup |
| ESD Rating | 2 kV HBM - withstands handling stress without latch-up or parameter shift |
| Operating Temp | −40°C to +125°C - supports industrial motor drives and UPS operating in harsh ambient |
Pinout & Package
TD352ID is housed in a standard SO-8 surface-mount package (ECOPACK® compliant), with 1.27 mm pitch, 4.9 mm × 3.9 mm body, and 150 °C/W junction-to-ambient thermal resistance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN (Pin 1) | Digital input | Edge-triggered logic input; clamped internally to 5–7 V; compatible with optocoupler pull-up to VREF or VH |
| VREF (Pin 2) | Voltage reference output | Stable 5.0 V ±0.15 V reference for timing circuits and noise-sensitive biasing; requires 10–100 nF decoupling |
| CD (Pin 3) | Delay timing node | Connects external RC network to set turn-on delay; internal 500 Ω discharge resistor enables accurate µs-scale timing |
| DESAT (Pin 4) | Fault sense input | Monitors IGBT collector-emitter voltage via external resistor divider; trips when > VH − 2 V |
| CLAMP (Pin 5) | Active clamp output | Drives low-impedance path to VL during IGBT off-time; limits Miller-induced gate voltage rise to ≤ VL + 4 V |
| VL (Pin 6) | Signal ground | Reference for IN, VREF, CD, DESAT, CLAMP; must be low-inductance connection to power ground |
| OUT (Pin 7) | Gate drive output | High-current push-pull output; sinks 1.7 A / sources 1.3 A (typ); drives IGBT/MOSFET gate directly |
| VH (Pin 8) | Positive supply | Power rail for output stage (UVLO monitored); operates from 10–26 V; supplies gate drive energy |
Key Features
| Feature | Design Value |
|---|---|
| Active Miller clamp | Eliminates need for negative gate drive in most IGBT applications, enabling single-supply bootstrap operation |
| Adjustable turn-on delay | Enables precise deadtime tuning between high/low side drivers using external R/C, preventing shoot-through |
| Desaturation protection with blanking | Programmable blanking time avoids false trips during IGBT turn-on transient; fault latches until power cycle |
| Integrated 5 V reference | Provides stable, low-noise reference for timing and sensing functions without external regulator |
| UVLO with hysteresis | Ensures clean startup and shutdown by disabling output until supply reaches safe operating window (9–10 V) |
Applications
| Industrial Motor Drives | Uninterruptible Power Supplies (UPS) |
|---|---|
Use Scenario: Three-phase PMSM or induction motor control in HVAC compressors and industrial pumps. IC Role / Device Role / Timing Role: High-side gate driver with active Miller clamp and desat protection in half-bridge leg of 1200 V inverter stage. Use Value: Enables reliable bootstrap high-side supply without negative rail; adjustable deadtime prevents cross-conduction under variable load conditions. | Use Scenario: Online double-conversion UPS delivering clean 230 V AC output from battery-backed DC bus. IC Role / Device Role / Timing Role: Gate driver for IGBTs in inverter stage, coordinating with DSP-controlled PWM and monitoring DESAT for overload/fault response. Use Value: Desaturation detection triggers immediate shutdown before IGBT destruction during short-circuit events; UVLO ensures graceful fail-safe behavior during AC input loss. |
| Solar Inverters | Electric Vehicle Onboard Chargers |
Use Scenario: String inverters converting PV DC to grid-synchronized AC, operating at 1000 V DC input. IC Role / Device Role / Timing Role: Isolated gate driver interface (with optocoupler input) controlling 1200 V IGBTs in H-bridge output stage. Use Value: Miller clamp suppresses gate oscillation during fast dV/dt switching in high-voltage PV strings; SO-8 package supports compact, thermally efficient PCB layout. | Use Scenario: Bidirectional AC/DC converter in EV OBC, managing 400 V battery charging and V2G export. IC Role / Device Role / Timing Role: High-reliability gate driver for Si IGBTs in dual-active-bridge topology, with DESAT and UVLO for functional safety compliance. Use Value: Latched fault behavior meets ASIL-B diagnostic requirements; adjustable turn-on delay allows fine-tuning of soft-switching transitions to reduce EMI. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar IGBT gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IR2110PbF | No integrated Miller clamp; no desat detection; fixed deadtime via external logic; lower peak current (2 A sink/2 A source) | Requires external negative supply or charge pump for high-side; no built-in fault protection | Choose when cost sensitivity outweighs protection integration and bootstrap simplification |
| UCC27324DR | Lower voltage rating (15 V max); no desat, UVLO, or Miller clamp; 4 A peak current; dual non-isolated outputs | Designed for low-voltage MOSFETs only; lacks high-voltage fault monitoring and timing features | Choose only for <600 V, low-power SMPS where full protection is handled externally |
Compared with IR2110PbF and UCC27324DR, TD352ID uniquely combines Miller clamping, desat detection, and programmable delay in a single SO-8 IC-reducing BOM count and enabling robust 1200 V inverter designs without auxiliary supplies or discrete protection circuits.
Availability
TD352ID is available at Aetrix Electronics and suitable for industrial motor drives, uninterruptible power supplies (UPS), and solar inverters requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for TD352ID includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, microcontroller, power, and sensor solutions for industrial, automotive, and consumer markets.
The TD352ID belongs to ST's high-voltage gate driver product line, engineered specifically for reliable, high-efficiency IGBT and MOSFET control in 1200 V industrial power conversion systems.
FAQ
What is the purpose of the CLAMP pin on TD352ID?
The CLAMP pin provides an active low-impedance path from the IGBT gate to VL during the off-state, suppressing Miller-induced voltage spikes. It activates when gate voltage falls below 2.0 V relative to VL and sustains ≤ VL + 4 V at up to 500 mA, eliminating need for negative gate drive in most applications.
How is desaturation protection configured and reset?
DESAT protection is configured using an external resistor divider from IGBT collector to VH and to DESAT pin; it trips when voltage exceeds VH − 2 V. The fault state is latched and can only be cleared by cycling power (VH down then up), ensuring persistent shutdown until manual intervention or system reset.
Can TD352ID drive both IGBTs and MOSFETs?
Yes - TD352ID is explicitly designed for both IGBTs and power MOSFETs. Its 1.7 A sink / 1.3 A source output current, Miller clamp, and desaturation detection suit high-dV/dt IGBT switching, while its logic-level input thresholds and fast 100 ns rise/fall times also support high-frequency MOSFET operation.
What is the recommended capacitor value for the CD pin to achieve 1 µs turn-on delay?
To achieve ~1 µs turn-on delay, use Rd = 10 kΩ and Cd = 143 pF, per Ta (µs) ≈ 0.7 × Rd (kΩ) × Cd (nF). For stability and noise immunity, Cd should be a C0G/NP0 ceramic capacitor; values between 100 pF and 1 nF are typical for µs-range delays.
TD352ID Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- High-Side
- Channel Type:
- Single
- Number of Drivers:
- 1
- Gate Type:
- IGBT, N-Channel MOSFET
- Voltage - Supply:
- 12V ~ 26V
- Logic Voltage - VIL, VIH:
- 0.8V, 4.2V
- Current - Peak Output (Source, Sink):
- 1.3A, 1.7A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 100ns, 100ns (Max)
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TD352ID FAQ
1.How can I place an order for TD352ID through Aetrix?
Please submit a Request for Quotation (RFQ) for TD352ID on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TD352ID reliable?
The price and inventory of TD352ID are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TD352ID is usually 5 days.
3.What payment methods are accepted for TD352ID?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TD352ID transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TD352ID?
TD352ID orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TD352ID order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TD352ID?
For technical support, including TD352ID datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TD352ID requirements.
6.How does Aetrix verify that TD352ID is sourced from the original manufacturer or authorized distributors?
All TD352ID products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TD352ID meets industry standards.
7.What is the process for return or replacement of TD352ID?
All TD352ID units undergo pre-shipment inspection (PSI). If there is an issue with TD352ID, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TD352ID part is unused and in its original packaging.
Return procedure for TD352ID:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TD352ID Tags

-
ZXGD3009E6TA
Diodes Incorporated

-
1EDN7512BXTSA1
Infineon Technologies
-
UCC27517DBVR
Texas Instruments

-
MCP1416T-E/OT
Microchip Technology

-
MCP1402T-E/OT
Microchip Technology

-
MCP1415T-E/OT
Microchip Technology

-
MCP1401T-E/OT
Microchip Technology

-
IX4428NTR
Littelfuse Inc.

-
IRS2005STRPBF
Infineon Technologies

-
IRS2008STRPBF
Infineon Technologies

-
IX4310TTR
Littelfuse Inc.

-
2EDN7524RXTMA1
Infineon Technologies
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

