STMicroelectronics TPA100
- Part No.:
- TPA100
- Manufacturer:
- STMicroelectronics
- Category:
- Thyristors
- Package:
- DO-204AC, DO-15, Axial
- Datasheet:
-
TPA100.pdf
- Description:
- THYRISTOR 100V 150A DO-204AC
- Quantity:
- Payment:

- Shipping:

Inventory:7,002
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPA100 from STMicroelectronics is a bidirectional Trisil™ thyristor surge protector designed for telecom line interface protection. It features 100 V standoff voltage (VRM), 135 V dynamic breakover voltage (VBO), 16 mA minimum holding current (IH), 50 A repetitive peak pulse current (10/1000 µs), and 35 pF capacitance at 50 V - enabling robust lightning and transient suppression in analog/digital xDSL/T1/E1 line cards.
For engineers reviewing the TPA100 datasheet, TPA100 pinout, TPA100 application, or TPA100 equivalent, this device is selected for fail-safe short-circuit clamping in telecom equipment requiring UL1459, FCC Part 68, ITU-T K20/K21, and IEC61000-4-5 compliance with minimal signal distortion and no aging-related degradation.
Technical Context
The TPA100 operates as a voltage-triggered bidirectional crowbar device that latches into low-impedance conduction upon exceeding its dynamic breakover voltage (135 V), sustaining conduction until current falls below 16 mA holding threshold. Its DO-15 package supports through-hole mounting with thermal resistance Rth(j-a) = 100 °C/W under recommended PCB layout.
It delivers fail-safe protection by shorting during overvoltage events, meeting GR-1089 Core first-level (2500 V, 10/1000 µs, 500 A) and ITU-T K20 (6000 V, 10/700 µs, 150 A) surge requirements when used with appropriate series impedance - validated per functional test circuits in Figures 9–11 of the official datasheet.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Standoff Voltage (VRM) | 100 V - maximum continuous reverse voltage before triggering; defines safe operating margin for 48 V telecom line interfaces. |
| Dynamic Breakover Voltage (VBO) | 135 V - voltage at which device triggers into conduction under fast transients (100 V/µs); ensures reliable clamping before downstream IC damage. |
| Holding Current (IH) | 16 mA min - minimum current required to maintain on-state; guarantees latching during sustained surges while allowing natural current decay in AC-coupled lines. |
| Repetitive Peak Pulse Current (IPP) | 50 A @ 10/1000 µs - peak surge current capability; meets GR-1089 and ITU-T K20 first-level surge immunity with proper series resistor selection. |
| Capacitance (C) | 35 pF @ 50 V - low junction capacitance minimizes signal attenuation and phase shift on high-speed xDSL lines up to 12 MHz. |
| Leakage Current (IRM) | 2 µA max @ VRM - ultra-low leakage preserves line integrity and avoids false triggering in low-power analog circuits. |
| Package | DO-15 - axial-leaded through-hole package with UL94 V0 epoxy, rated for 260 °C soldering and suitable for industrial telecom PCB assembly. |
Pinout & Package
TPA100 uses a DO-15 axial-leaded package (JEDEC DO-204AL) with two terminals: Anode (A) and Cathode (K). The device is bidirectional - either terminal may serve as anode or cathode depending on transient polarity. Leads are tinned copper, compatible with wave and hand soldering per JEDEC J-STD-020.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode (A) | Positive conduction path during positive half-cycle transients | Connects to protected line side; forms low-impedance shunt path to ground when VAK exceeds VBO. |
| Cathode (K) | Positive conduction path during negative half-cycle transients | Connects to protected line side; enables symmetrical bidirectional clamping without polarity constraints. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional crowbar action | Clamps both polarities of lightning-induced surges without external polarity management or dual-device placement. |
| Fail-safe short-circuit mode | Guarantees permanent low-impedance state after catastrophic overvoltage - prevents latent failure and supports UL497B certification (file E136224). |
| No parameter drift over time | Trisil structure eliminates aging effects common in MOVs and GDTs, ensuring consistent clamping performance across 15+ years of field operation. |
| UL94 V0 epoxy encapsulation | Self-extinguishing housing withstands flame propagation during fault conditions, satisfying safety requirements for central office and customer premises equipment. |
| Compliance-ready design | Validated against ITU-T K20/K21, GR-1089 Core, IEC61000-4-5, FCC Part 68, and VDE0433 - reduces system-level certification effort. |
Applications
| DSL Line Card Protection | T1/E1 Interface Protection |
|---|---|
Use Scenario: Protecting ADSL/VDSL line interface circuitry on carrier-grade DSLAM line cards exposed to induced lightning surges on outside plant wiring. IC Role / Device Role / Timing Role: Primary crowbar protector placed between transformer secondary and line driver IC, triggered within nanoseconds to clamp transients before reaching sensitive analog front-end. Use Value: 35 pF capacitance avoids signal integrity loss at 12 MHz, while 50 A IPP rating handles repeated 10/1000 µs surges per GR-1089 without degradation. | Use Scenario: Safeguarding T1/E1 data links in PBX and channel bank equipment connected to telco central office lines. IC Role / Device Role / Timing Role: Bidirectional overvoltage clamp on balanced differential pairs, operating symmetrically across ±100 V common-mode transients. Use Value: 100 V VRM provides 2× margin over nominal ±48 V supply rails, and fail-safe short-circuit behavior ensures continued protection even after multiple surge events. |
| ISDN Terminal Protection | Fax/Modem Interface Protection |
Use Scenario: Surge protection for BRI (Basic Rate Interface) ports in ISDN terminal adapters and routers deployed in enterprise environments. IC Role / Device Role / Timing Role: First-line protector on U-interface side, placed ahead of hybrid transformer to absorb longitudinal surges coupled from PSTN lines. Use Value: 135 V VBO ensures triggering before transformer saturation or line driver latch-up, and DO-15 package allows cost-effective through-hole manufacturing. | Use Scenario: Transient suppression on analog telephone line inputs of consumer fax machines and dial-up modems. IC Role / Device Role / Timing Role: Fail-safe crowbar element bridging tip/ring lines to chassis ground, activated only during >135 V surges to avoid interference with normal POTS signaling. Use Value: 2 µA max leakage prevents off-hook detection errors, and UL497B listing satisfies FCC Part 68 Type A/B lightning surge requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar telecom surge protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPA120 | Higher 120 V VRM and 160 V VBO; same DO-15 package and 50 A IPP rating. | Suitable for systems with higher nominal line voltages (e.g., -75 V DC bias in some legacy T1 designs). | Select when design requires ≥120 V standoff margin or operates in environments with elevated baseline common-mode noise. |
| SMTPA100 | Same electrical specs (100 V VRM, 135 V VBO, 16 mA IH, 50 A IPP), but in SMB (DO-214AA) surface-mount package. | Enables automated SMT assembly and reduced PCB footprint versus through-hole DO-15. | Choose for space-constrained or high-volume production where reflow compatibility and smaller board area are prioritized. |
Compared with TPA120, the TPA100 offers tighter voltage margin for standard -48 V telecom systems; compared with SMTPA100, it trades SMT efficiency for mechanical robustness and higher power dissipation capability in through-hole layouts.
Availability
TPA100 is available at Aetrix Electronics and suitable for DSL line card protection, T1/E1 interface hardening, and ISDN terminal surge suppression requiring stable component supply across multi-year telecom infrastructure deployments.
Supply support for TPA100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in power management, analog, MEMS, and automotive ICs with broad industrial and communications portfolio coverage.
The Trisil™ product line was developed specifically for fail-safe, maintenance-free surge protection in telecom infrastructure - targeting GR-1089, ITU-T, and FCC-mandated reliability across central office, CPE, and access network equipment.
FAQ
What is the fail-safe behavior of TPA100 during overvoltage events?
TPA100 enters a permanent short-circuit state when subjected to energy exceeding its I²t rating, providing continued protection even after catastrophic failure. This behavior is certified under UL497B (file E136224) and ensures downstream circuitry remains isolated from hazardous voltages - unlike MOVs or GDTs that may degrade open-circuit.
How does TPA100 compare to MOV-based protectors in telecom applications?
TPA100 offers superior response time (<100 ns vs. ~500 ns for MOVs), zero parameter drift over decades, and guaranteed fail-safe shorting. MOVs exhibit capacitance increase and leakage growth with aging, risking false triggering or silent failure - making TPA100 preferred for mission-critical telecom line cards requiring long-term reliability.
Can TPA100 be used in AC-powered telephone line interfaces?
Yes - its bidirectional structure and 100 V VRM rating support direct placement across AC-coupled tip/ring lines. When used with a series current-limiting resistor (e.g., 10 Ω for FCC Part 68 Type A), it clamps 1500 V/10/160 µs surges while maintaining <2 µA leakage during normal 90 Vrms ringing signals.
What is the recommended PCB layout for optimal thermal performance of TPA100?
Use the DO-15 footprint specified in Figure 12 (page 8), with 10 mm lead length and minimum 250 mil copper pour connected to each pad. This achieves Rth(j-a) = 100 °C/W. Avoid narrow traces or thermal isolation - the device relies on lead conduction and pad copper mass to dissipate 1.5 W peak surge energy without junction overheating.
TPA100 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- DO-204AC, DO-15, Axial
- Series:
- TPA, TRISIL™
- Packaging:
- Tape & Box (TB)
- Product Status:
- Obsolete
- Voltage - Breakover:
- 133V
- Voltage - Off State:
- 100V
- Voltage - On State:
- -
- Current - Peak Pulse (8/20µs):
- 150 A
- Current - Peak Pulse (10/1000µs):
- 50 A
- Current - Hold (Ih):
- 150 mA
- Number of Elements:
- 1
- Capacitance:
- 35pF
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- DO-204AC (DO-15)
TPA100 FAQ
1.How can I place an order for TPA100 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPA100 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPA100 reliable?
The price and inventory of TPA100 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPA100 is usually 5 days.
3.What payment methods are accepted for TPA100?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPA100 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPA100?
TPA100 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPA100 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPA100?
For technical support, including TPA100 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPA100 requirements.
6.How does Aetrix verify that TPA100 is sourced from the original manufacturer or authorized distributors?
All TPA100 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPA100 meets industry standards.
7.What is the process for return or replacement of TPA100?
All TPA100 units undergo pre-shipment inspection (PSI). If there is an issue with TPA100, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPA100 part is unused and in its original packaging.
Return procedure for TPA100:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPA100 Tags

-
TISP4015L1AJR-S
Bourns Inc.

-
TISP4015L1BJR-S
Bourns Inc.

-
SMP100LC-270
STMicroelectronics

-
TISP4240M3BJR-S
Bourns Inc.

-
SMP100LC-35
STMicroelectronics

-
SMP100LC-65
STMicroelectronics

-
SMP100LC-8
STMicroelectronics

-
TISP4P035L1NR-S
Bourns Inc.

-
TISP4350H3BJR-S
Bourns Inc.

-
TISP4011H1BJR-S
Bourns Inc.

-
SMP100LC-400
STMicroelectronics

-
P0300SALRP
Littelfuse Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

