Texas Instruments TPS23750PWPRG4

Overview

TPS23750PWPRG4 from Texas Instruments is an integrated IEEE 802.3af Power over Ethernet (PoE) Powered Device (PD) interface and primary-side DC/DC PWM controller. It features a 100 V, 0.6 Ω internal pass MOSFET, programmable switching frequency (90–565 kHz), 1.50 V FB regulation voltage, and supports flyback, forward, and nonsynchronous buck topologies in VoIP phones and security cameras.

For engineers reviewing the TPS23750PWPRG4 datasheet, TPS23750PWPRG4 pinout, TPS23750PWPRG4 application, or TPS23750PWPRG4 equivalent, key selection criteria include PoE detection/classification compliance, integrated current-mode DC/DC control, thermal shutdown at 140°C, UVLO thresholds (30.5 V/39.3 V), and TSSOP-20 PowerPAD™ package compatibility with industrial temperature range (–40°C to 85°C).

Technical Context

The TPS23750PWPRG4 integrates dual functional blocks: an IEEE 802.3af-compliant PoE front end (detection, classification, UVLO, inrush limiting) and a current-mode DC/DC PWM controller with error amplifier, soft-start timer (TMR), and gate driver. Its architecture enables isolated and non-isolated topologies without external PoE switch components.

It implements programmable frequency via FREQ pin resistor (30–300 kΩ), 50% maximum duty cycle limiting, leading-edge blanking on RSP/RSN with BL-selectable delay (70–140 ns), and dual bias rails: 5 V VBIAS for logic and 10 V AUX for gate drive. The internal 0.6 Ω RTN MOSFET handles up to 450 mA current limit and 100 V input.

Key Specifications

Pinout & Package

TSSOP-20 PowerPAD™ package with exposed thermal pad (internally connected to VSS) for enhanced heat dissipation in PoE PD applications.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PoE PD controller applications.

Compared with TPS23770PWPR and LT4275AIMSE#TRPBF, the TPS23750PWPRG4 offers the lowest BOM cost for standard 802.3af Class 0–4 implementations, retains full pin compatibility with legacy TPS2375 designs, and provides superior thermal performance in TSSOP-20 PowerPAD™ for sustained 10 W operation.

Availability

TPS23750PWPRG4 is available at Aetrix Electronics and suitable for VoIP phones, IP security cameras, and wireless access points requiring stable component supply, long-term lifecycle support, and industrial-grade reliability under continuous PoE stress conditions.

Supply support for TPS23750PWPRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity solutions, with decades of leadership in power management and industrial interface ICs.

The TPS23750PWPRG4 belongs to TI's Power over Ethernet product line, engineered specifically to simplify IEEE 802.3af PD front-end design while enabling flexible, efficient DC/DC conversion for networked endpoint devices.

FAQ

What is the UVLO threshold configuration for TPS23750PWPRG4?

The TPS23750PWPRG4 uses standard IEEE 802.3af UVLO thresholds: 30.5 V (falling) and 39.3 V (rising), with 8.8 V hysteresis. This ensures reliable turn-on after PoE detection and prevents oscillation near dropout. The TPS23750PWPRG4 does not support legacy UVLO mode-that is exclusive to the TPS23770 variant.

Can TPS23750PWPRG4 drive an external MOSFET in a flyback topology?

Yes, the TPS23750PWPRG4 GATE pin delivers 11.9 V output swing and 0.8 A peak source/1.3 A peak sink current, sufficient to drive N-channel MOSFETs up to 20 nC gate charge. Its current-mode control, programmable frequency, and 50% duty cycle limit make it well-suited for primary-side flyback designs in PoE PD applications.

How does the TPS23750PWPRG4 handle PoE classification for Class 4 devices?

The TPS23750PWPRG4 supports Class 4 via external RCLASS = 255 Ω, drawing 38.0–41.2 mA during classification. It applies ~10 V to CLASS for ≤75 ms, meeting 802.3af timing requirements. The device validates classification current internally and proceeds to power-up only upon successful Class 0–4 handshake.

What is the purpose of the BL pin on TPS23750PWPRG4?

The BL pin on TPS23750PWPRG4 selects current-sense blanking duration: floating = minimum delay (~40 ns), tied to RSN = +70 ns, tied to VBIAS = +105 ns. This prevents false triggering of the current limit comparator by gate-drive and rectifier recovery spikes-critical in high-frequency or high-dI/dt topologies.

Is thermal management supported in the TPS23750PWPRG4 package?

Yes, the TPS23750PWPRG4 uses a TSSOP-20 PowerPAD™ package with an exposed VSS-connected thermal pad. With TI-recommended PCB layout (2 oz copper, thermal vias), it achieves θ_JA = 73.8°C/W, enabling 1.2 W continuous dissipation at 85°C ambient-sufficient for 10 W PoE PD designs with proper heatsinking.