Texas Instruments TPS2376DG4

Overview

TPS2376DG4 from Texas Instruments is an IEEE 802.3af-compliant powered device (PD) controller for Power over Ethernet applications, integrating a 0.58-Ω low-side MOSFET switch, programmable UVLO via dedicated UVLO pin, 450-mA fixed operational current limit, and open-drain power-good (PG) output. It operates across –40°C to 85°C and supports Class 3 PD implementations in VoIP phones and security cameras.

For engineers reviewing the TPS2376DG4 datasheet, TPS2376DG4 pinout, TPS2376DG4 application, or TPS2376DG4 equivalent, key selection considerations include its adjustable UVLO threshold (1.93 V / 2.49 V), 100-V absolute maximum RTN/VDD rating, inrush current programmability via ILIM pin, thermal shutdown at 135°C, and compatibility with legacy and compliant PSEs.

Technical Context

The TPS2376DG4 implements detection, classification, and power delivery control using internal comparators with hysteresis for stable state transitions between IEEE 802.3af detection (2.7–10.1 V), classification (13–21 V), and operation (>30 V). Its UVLO comparator connects directly to the external UVLO pin-unlike TPS2375/TPS2377-enabling resistor-divider-based threshold tuning.

It features a true open-drain PG output referenced to RTN, not VSS, with deglitch timing of 75–225 µs, and integrates a 0.58-Ω, 100-V low-side pass device with 450-mA fixed current limiting and 100–180-mA programmable inrush control via ILIM. Classification is set by an external resistor (255–4420 Ω) on CLASS, and detection uses a 24.9-kΩ resistor on DET.

Key Specifications

Pinout & Package

TPS2376DG4 is housed in an 8-pin SOIC package (D−8) with standard JEDEC MS-012AC footprint, 1.27-mm pitch, and exposed pad not present. Thermal resistance θJA is 238°C/W (low-K board) and 150°C/W (high-K board).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar powered device controller applications.

Compared with TPS2375D and TPS2377D, the TPS2376DG4 uniquely provides field-programmable UVLO thresholds via an external resistor divider-enabling one hardware design to support both modern and legacy PoE infrastructure without layout changes or component swaps.

Availability

TPS2376DG4 is available at Aetrix Electronics and suitable for VoIP phones, WLAN access points, security cameras, and POS terminals requiring stable component supply, long-term lifecycle assurance, and consistent parametric performance across temperature.

Supply support for TPS2376DG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and connectivity technologies, with leadership in power management and industrial interface solutions.

The TPS237x family is designed specifically for IEEE 802.3af Power over Ethernet powered devices, delivering integrated detection, classification, UVLO, inrush control, and power-switching functions in compact SOIC and TSSOP packages.

FAQ

What is the primary function of the UVLO pin on the TPS2376DG4?

The UVLO pin on the TPS2376DG4 accepts an external resistor divider between VDD and VSS to set programmable upper and lower undervoltage lockout thresholds (1.93 V / 2.49 V nominal). Unlike the fixed-threshold TPS2375D and TPS2377D, this pin enables one hardware design to adapt to both IEEE 802.3af-compliant and legacy PSEs with varying output voltages - a capability confirmed in TI's SLVS525B datasheet section "UVLO" and functional block diagram.

How does the TPS2376DG4 implement inrush current limiting?

The TPS2376DG4 implements inrush current limiting via the ILIM pin (Pin 1), which sinks current proportional to RTN voltage. A resistor (62.5–500 kΩ) from ILIM to VSS sets the inrush limit between 100 mA and 180 mA, as defined by Equation 1 in the datasheet. This prevents input voltage sag during bulk capacitor charging and is distinct from its fixed 450-mA operational current limit - both parameters are validated in the "ELECTRICAL CHARACTERISTICS" table under I(LIM) and I(LIM) Inrush Limit.

What is the role of the PG pin on the TPS2376DG4, and how is it different from typical power-good outputs?

The PG pin on the TPS2376DG4 is a true open-drain output referenced to RTN-not VSS-enabling direct interfacing with downstream DC/DC enable inputs without level shifting. It asserts high-impedance only after RTN reaches ≥10 V and inrush current falls below 85% of the programmed limit. Its 75–225 µs deglitch timing and RTN-referenced pull-down (not VSS) are explicitly specified in the "PG" electrical characteristics table and functional block diagram of the TPS2376DG4 datasheet.

Can the TPS2376DG4 be used in Class 4 powered device applications?

Yes, the TPS2376DG4 supports IEEE 802.3af Class 4 operation by configuring the CLASS pin with a 255-Ω ±1% resistor, which draws 38.0–41.2 mA during classification (13–21 V), matching the Class 4 specification. Its 0.58-Ω pass device and 450-mA current limit sustain the required 12.95 W at the PD input. This capability is confirmed in Table 1 ("CLASSIFICATION") and the "Classification current" electrical characteristic row of the TPS2376DG4 datasheet.

What package type and thermal characteristics apply to the TPS2376DG4?

The TPS2376DG4 is supplied in an 8-pin SOIC package (D−8, JEDEC MS-012AC), with θJA = 238°C/W (low-K board) and 150°C/W (high-K board), and maximum junction temperature of 125°C. These values are documented in the "DISSIPATION RATING TABLE" and "ABSOLUTE MAXIMUM RATINGS" sections of the official TPS2376DG4 datasheet (SLVS525B), and align with the "D (SO-8)" package entry in the "AVAILABLE OPTIONS" table.