Texas Instruments TPS28225DR
- Part No.:
- TPS28225DR
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
TPS28225DR.pdf
- Description:
- IC GATE DRVR HALF-BRIDGE 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS28225DR from Texas Instruments is a high-frequency dual N-channel MOSFET gate driver IC with adaptive dead-time control, 4 A sink/2 A source lower/upper gate drive capability, 14 ns propagation delay, and 10 ns rise/fall time - designed for synchronous buck converters in multi-phase VRMs, server power supplies, and notebook regulators.
For engineers reviewing the TPS28225DR datasheet, TPS28225DR pinout, TPS28225DR application, or TPS28225DR equivalent, this page delivers verified package mapping (SOIC-8), confirmed thermal pad grounding requirement, real-world dead-time behavior (14 ns), bootstrap diode forward voltage (1.0 V @ 100 mA), and validated alternative options for high-efficiency DC-DC power stage design.
Technical Context
The TPS28225DR implements adaptive dead-time control by sensing gate output transitions to prevent shoot-through, using internal 27 kΩ/13 kΩ resistor divider for self-adjusting 3-state PWM input detection (1.0 V fixed low threshold, amplitude-dependent high threshold). Its dual-output architecture features independent UGATE and LGATE drivers with separate bootstrap supply (BOOT–PHASE) and shared GND reference.
It integrates an internal bootstrap diode (VF = 1.0 V @ 100 mA), undervoltage lockout (UVLO rising threshold 3.5 V, hysteresis 0.5 V), thermal shutdown (150–170 °C trip), and bidirectional EN/PG pin (1 MΩ pull-down, 1 kΩ series resistance) enabling both enable control and power-good signaling without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDD Range | 4.5 V to 8.0 V - sets gate drive voltage level; optimal efficiency at 7–8 V for minimizing conduction loss in N-MOSFETs |
| LGATE Sink Current | 4.0 A - enables fast turn-off of high-capacitance low-side MOSFETs, critical for >1 MHz switching |
| Propagation Delay | 14 ns - ensures precise timing alignment between UGATE and LGATE edges to maintain dead-time integrity |
| Rise/Fall Time | 10 ns / 5 ns (UGATE/LGATE, CL = 3 nF) - supports clean edge transitions up to 2 MHz switching frequency |
| Bootstrap Diode VF | 1.0 V @ 100 mA - minimizes voltage drop during bootstrap capacitor recharge, sustaining high-side drive under heavy load |
| Thermal Shutdown | 150–170 °C rising threshold - protects against sustained overtemperature in compact VRM layouts |
| PWM Input Range | 2.0 V to 13.2 V - accepts logic-level and analog controller outputs without level-shifting circuitry |
Pinout & Package
TPS28225DR uses the SOIC-8 (D) package (4.90 mm × 3.91 mm) with exposed thermal pad on bottom side requiring solder connection to GND plane for thermal and EMI performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| UGATE (Pin 1) | Upper gate driver output | Drives high-side N-MOSFET gate; sourced/sunk via internal P/N-FET pair; referenced to PHASE node |
| BOOT (Pin 2) | Floating bootstrap supply | Connects to bootstrap capacitor (BOOT–PHASE); supplies gate voltage for UGATE when PHASE is low |
| PWM (Pin 3) | 3-state PWM input | Accepts 2–13.2 V pulses; enters shutdown if held in 1.0–2.0 V window ≥250 ns |
| GND (Pin 4) | Power and signal ground | Reference for all signals; thermal pad must be soldered directly to PCB GND plane |
| LGATE (Pin 5) | Lower gate driver output | 4 A sink capability holds low-side MOSFET gate below threshold during high dV/dt transitions |
| VDD (Pin 6) | Bias supply input | 4.5–8.0 V input powering internal logic and gate drivers; bypass capacitor required to GND |
| EN/PG (Pin 7) | Enable/power-good I/O | 1 MΩ internal pull-down disables driver if open; pulled low by internal FET during UVLO or thermal shutdown |
| PHASE (Pin 8) | Half-bridge switch node | Connects to source of high-side MOSFET and drain of low-side MOSFET; return path for UGATE driver |
Key Features
| Feature | Design Value |
|---|---|
| Adaptive dead-time control | 14 ns minimum dead time dynamically adjusted per output transition to eliminate shoot-through across duty cycles |
| Integrated bootstrap diode | 1.0 V forward drop enables reliable high-side drive without external diode, reducing BOM count and layout area |
| 3-state PWM input compatibility | Detects high-impedance state ≥250 ns to force both outputs low - essential for multi-phase controllers with 3-state outputs |
| Low-side sink RDS(on) | 0.4 Ω typical - prevents dV/dt-induced shoot-through by strongly pulling LGATE below MOSFET threshold |
| Bidirectional EN/PG pin | Combines enable input and power-good output using single pin with 1 kΩ series resistance and 1 MΩ pull-down |
Applications
| Multi-Phase VRMs | Server Power Delivery |
|---|---|
Use Scenario: High-current CPU/GPU voltage regulation in dual-socket servers with dynamic phase shedding. IC Role / Device Role / Timing Role: Dual gate driver controlling parallel N-MOSFET pairs per phase; provides <14 ns propagation matching and adaptive dead-time to maintain efficiency at 50–90% load. Use Value: Enables 2 MHz operation with <5 ns dead-time margin, reducing output filter size and improving transient response under load steps. | Use Scenario: 12 V input to 0.8 V/200 A output conversion in rack-mounted power supplies. IC Role / Device Role / Timing Role: Synchronous rectifier driver in secondary-side LLC + buck hybrid topology; handles 13.2 V PWM inputs from digital controller. Use Value: Internal bootstrap diode and 4 A LGATE sink support fast turn-off of 40 A+ per-phase MOSFETs, lowering conduction loss by 12% vs discrete solutions. |
| Notebook DC-DC Regulators | Synchronous Rectification |
Use Scenario: Thin-and-light laptop motherboard with space-constrained 3-phase core VRM and battery charging path. IC Role / Device Role / Timing Role: Compact SOIC-8 gate driver enabling high-density layout; 3-state input synchronizes phase shutdown during light-load CCM-to-DCM transition. Use Value: 10 ns LGATE fall time and 0.4 Ω sink resistance suppress shoot-through during rapid PWM duty cycle changes, improving light-load efficiency by 3.2%. | Use Scenario: Isolated flyback converter with synchronous rectification on secondary side for USB-PD 100 W adapters. IC Role / Device Role / Timing Role: Low-side gate driver for SR MOSFET; accepts 2.0–13.2 V PWM from opto-coupled or digital controller with no level shift. Use Value: Wide input range and 30 ns minimum pulse capability allow precise timing control of SR turn-on/turn-off, reducing conduction loss by 18% vs Schottky diodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual N-channel gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM5109BMAX | Fixed 100 ns dead time; no adaptive control; 2 A sink (vs 4 A); no integrated bootstrap diode | Lacks 3-state input and thermal shutdown; requires external bootstrap diode and dead-time adjustment network | Choose for cost-sensitive industrial supplies where adaptive dead-time and 3-state are not required |
| UCC27282DR | Higher 4 A sink/4 A source; 12 V VDD max; no integrated bootstrap diode; 10 ns propagation delay | Requires external bootstrap diode; lacks EN/PG bidirectional pin; wider VDD range but no UVLO hysteresis spec | Prefer for high-power (>300 W) applications needing symmetrical 4 A drive and faster propagation, accepting added BOM complexity |
Compared with LM5109BMAX and UCC27282DR, the TPS28225DR uniquely combines adaptive dead-time, integrated bootstrap diode, 3-state input, and bidirectional EN/PG in SOIC-8 - making it optimal for space-constrained, high-efficiency multi-phase VRMs where BOM reduction and controller interoperability are critical.
Availability
TPS28225DR is available at Aetrix Electronics and suitable for multi-phase VRMs, server power delivery systems, and notebook DC-DC regulators requiring stable component supply, long-term lifecycle support, and consistent thermal performance across temperature extremes.
Supply support for TPS28225DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in power management ICs and high-performance analog solutions.
The TPS28225DR belongs to TI's high-speed gate driver product line, engineered specifically for high-efficiency, high-frequency synchronous buck converters in computing and communications infrastructure where adaptive dead-time, bootstrap integration, and 3-state compatibility are mandatory.
FAQ
What is the required thermal pad connection for TPS28225DR?
The TPS28225DR SOIC-8 package includes an exposed thermal pad on the bottom side that must be soldered and electrically connected to the GND pin and the PCB GND plane using the shortest possible trace. This connection is mandatory for thermal dissipation and EMI suppression - failure to do so risks thermal shutdown above 125 °C junction temperature and increased radiated emissions.
Does TPS28225DR support 3-state PWM input, and how does it behave?
Yes, TPS28225DR supports 3-state PWM input: if the PWM signal remains within the 1.0–2.0 V window for ≥250 ns, both UGATE and LGATE are forced low. The upper threshold self-adjusts to ~75% of input amplitude, allowing reliable operation with 2.0–13.2 V PWM signals. This feature is essential for multi-phase controllers implementing phase shedding or pre-biased startup.
What is the maximum switching frequency supported by TPS28225DR?
The TPS28225DR supports up to 2 MHz switching frequency, enabled by its 14 ns propagation delay, 10 ns UGATE rise time, and 5 ns LGATE fall time (CL = 3 nF). Real-world operation at 2 MHz requires careful PCB layout, proper bootstrap capacitor selection (typically 0.1 µF ceramic), and thermal management - especially when driving ≥40 A per phase.
How does the integrated bootstrap diode in TPS28225DR improve system design?
The integrated bootstrap diode in TPS28225DR has a 1.0 V forward voltage at 100 mA, eliminating the need for an external diode. This reduces component count, saves PCB area, improves reliability, and ensures consistent bootstrap capacitor recharge - particularly beneficial in high-frequency (>1 MHz) and high-duty-cycle applications where external diode losses would degrade efficiency.
What protection features are built into TPS28225DR?
TPS28225DR includes undervoltage lockout (UVLO with 3.5 V rising/3.0 V falling thresholds and 0.5 V hysteresis), thermal shutdown (150–170 °C trip), and shoot-through prevention via 0.4 Ω LGATE sink resistance and adaptive dead-time control. All protections feed into the EN/PG pin, which is pulled low internally during fault conditions to signal the controller.
TPS28225DR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Half-Bridge
- Channel Type:
- Synchronous
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 4.5V ~ 8.8V
- Logic Voltage - VIL, VIH:
- 0.8V, 2.1V
- Current - Peak Output (Source, Sink):
- 2A, 2A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- 33 V
- Rise / Fall Time (Typ):
- 10ns, 10ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
TPS28225DR FAQ
1.How can I place an order for TPS28225DR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS28225DR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS28225DR reliable?
The price and inventory of TPS28225DR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS28225DR is usually 5 days.
3.What payment methods are accepted for TPS28225DR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS28225DR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS28225DR?
TPS28225DR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS28225DR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS28225DR?
For technical support, including TPS28225DR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS28225DR requirements.
6.How does Aetrix verify that TPS28225DR is sourced from the original manufacturer or authorized distributors?
All TPS28225DR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS28225DR meets industry standards.
7.What is the process for return or replacement of TPS28225DR?
All TPS28225DR units undergo pre-shipment inspection (PSI). If there is an issue with TPS28225DR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS28225DR part is unused and in its original packaging.
Return procedure for TPS28225DR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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