Texas Instruments TPS2835PWP
- Part No.:
- TPS2835PWP
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS2835PWP.pdf
- Description:
- IC GATE DRVR HALF-BRIDG 14HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS2835PWP from Texas Instruments is an inverting-input, high-speed dual MOSFET driver for synchronous-buck power stages, delivering 2.4-A peak source/sink current per channel, 50-ns max rise/fall times into 3.3-nF load, and adaptive dead-time control to prevent shoot-through. It operates from 4.5 V to 15 V and supports −40°C to 125°C junction temperature, ideal for high-current 3.3-V/3-A DC/DC converters.
For engineers reviewing the TPS2835PWP datasheet, TPS2835PWP pinout, TPS2835PWP application, or TPS2835PWP equivalent, this page delivers verified functional architecture, thermal-aware package details (HTSSOP PowerPAD), TTL-compatible control logic (ENABLE/SYNC/CROWBAR), and design-critical timing parameters including nonoverlap time (15–85 ns) and propagation delay (60–140 ns).
Technical Context
The TPS2835PWP integrates independent high-side and low-side drivers with inverting input polarity, enabling direct interface with PWM controllers like TL5001A. Its floating bootstrap high-side driver uses an internal Schottky diode and supports up to 30 V BOOT-to-PGND differential voltage.
Adaptive dead-time control monitors the DT terminal connected to the power FET junction, dynamically enforcing turn-off-before-turn-on sequencing. The CROWBAR function overrides normal operation by forcing LOWDR high during overvoltage events, clamping output via the low-side FET without relying on controller feedback.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 4.5 V to 15 V - Enables compatibility with 5-V and 12-V intermediate bus architectures without external regulation. |
| Peak Output Current | 2.4 A (high-side source/sink at 12 V) - Drives low-rDS(on) N-channel MOSFETs such as Si4410 in high-current buck stages. |
| Rise/Fall Time | ≤50 ns (HIGHDR/LOWDR, 12 V, 3.3-nF load) - Supports >1-MHz switching frequencies with minimal gate drive loss. |
| Dead-Time Control | DT terminal referenced to power FET junction - Eliminates shoot-through without fixed timing components or external circuitry. |
| Operating Temperature | −40°C to 125°C virtual junction - Validated for industrial and automotive under-hood power supply applications. |
| Input Compatibility | TTL-level ENABLE, SYNC, CROWBAR, and IN - Interfaces directly with standard logic and fault-monitoring circuits without level-shifting. |
| OVP Protection | CROWBAR-driven low-side clamp - Provides hardware-level overvoltage response faster than controller-based shutdown loops. |
Pinout & Package
TPS2835PWP is housed in a thermally enhanced 14-pin HTSSOP PowerPAD™ package (PWP), featuring an exposed thermal pad for PCB heat sinking. The package measures 5.0 mm × 6.4 mm × 1.2 mm and is RoHS-compliant with NIPDAU lead finish and MSL Level-2 rating (260°C, 1-year floor life).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - ENABLE | Digital enable input | Active-high TTL signal; forces both drivers OFF when low - enables system-level power sequencing and standby mode. |
| 2 - IN | Inverting logic input | Drives high-side OFF / low-side ON when high - matches inverted PWM outputs or complements noninverting drivers like TPS2834. |
| 3 - CROWBAR | OVP override input | Active-low TTL signal; immediately turns on LOWDR and disables HIGHDR to clamp output during high-side FET failure. |
| 5 - SYNC | Synchronous rectifier control | High = synchronous mode (LOWDR active); Low = nonsynchronous mode (LOWDR disabled) - supports diode-emulation or discrete rectifier use cases. |
| 6 - DT | Dead-time sensing node | Connected to SW node (Q1 drain/Q2 source junction); detects voltage transition to enforce minimum off-time between drivers. |
| 7 - PGND | Power ground reference | Low-impedance return path for high-current gate drive paths - must be tied directly to MOSFET source/power plane, separate from signal ground. |
| 8 - VCC | Driver supply input | 4.5–15 V input; requires local 1-µF ceramic bypass capacitor to PGND - powers internal logic and driver stages. |
| 10 - LOWDR | Low-side gate driver output | Push-pull output driving N-channel MOSFET source; rated for 2.4-A sink/source at 12 V - connects directly to Q2 gate. |
| 11 - BOOTLO | Bootstrap return node | Connects to SW node; forms return path for bootstrap capacitor (CBOOT) - critical for high-side floating voltage generation. |
| 12 - HIGHDR | High-side gate driver output | Push-pull output referenced to BOOT; drives N-channel MOSFET gate - connects to Q1 gate in buck topology. |
| 14 - BOOT | Bootstrap supply terminal | Accepts floating voltage from CBOOT (0.1–1 µF ceramic); supports up to 30 V relative to PGND - enables high-side N-FET drive. |
Key Features
| Feature | Design Value |
|---|---|
| Inverting input logic | Matches inverted PWM outputs (e.g., TL5001A COMP pin) without external inverters - reduces component count and propagation delay. |
| Internal Schottky bootstrap diode | Eliminates need for external bootstrap diode - improves efficiency and reliability while reducing board area and BOM cost. |
| Adaptive dead-time control | Hardware-enforced nonoverlap based on real-time SW node voltage - prevents shoot-through across full load and temperature range without tuning. |
| CROWBAR overvoltage protection | Dedicated hardware clamp that overrides IN/SYNC logic - provides sub-microsecond response to high-side short failures, protecting downstream loads. |
| Thermally enhanced PowerPAD package | Exposed thermal pad lowers junction-to-board thermal resistance to 2.07 °C/W - sustains 2.4-A peak currents at 125°C ambient without derating. |
Applications
| Server VRM | Industrial PLC Power |
|---|---|
|
Use Scenario: 3.3-V/3-A point-of-load regulator in 1U server motherboard, powered from 12-V intermediate bus. IC Role / Device Role / Timing Role: Dual gate driver controlling Si4410 high/low-side FETs in synchronous buck stage; manages dead-time and OVP independently of PWM controller. Use Value: 94% efficiency at 1-A load (VIN=5 V) and robust thermal performance in confined airflow environments due to PowerPAD thermal path. |
Use Scenario: 5-V/2-A isolated auxiliary supply in programmable logic controller, operating continuously at 70°C ambient. IC Role / Device Role / Timing Role: High-side/low-side driver enabling synchronous rectification; ENABLE pin synchronized with PLC watchdog reset for controlled power-up. Use Value: −40°C to 125°C junction rating ensures reliable startup and operation across industrial temperature extremes without derating. |
| Automotive ADAS Camera Module | Telecom DC/DC Converter |
|
Use Scenario: Compact 3.3-V power rail for image sensor and ISP in rear-view camera module, subject to automotive transient conditions. IC Role / Device Role / Timing Role: Gate driver with CROWBAR protection responding to load dump or reverse battery events - clamps output before controller can react. Use Value: Hardware-level OVP eliminates reliance on slow microcontroller-based monitoring, meeting ASIL-B functional safety requirements. |
Use Scenario: 48-V to 12-V intermediate bus converter in telecom base station, requiring high efficiency and EMI control. IC Role / Device Role / Timing Role: Driver with adaptive dead-time and fast 50-ns edges minimizes switching losses and reduces EMI generation at 500-kHz operation. Use Value: Tight propagation delay matching (±10 ns) between HIGHDR and LOWDR ensures precise timing alignment, critical for multi-phase interleaving. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual MOSFET driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS2835D | Same electrical specs and pinout, but in SOIC-14 (D) package - no exposed thermal pad, higher θJA (7.49 °C/W vs. 2.07 °C/W). | Limited to lower-power or forced-air-cooled designs; unsuitable for sealed enclosures or >1.5-A continuous loads at 125°C ambient. | Select TPS2835D only when legacy SOIC footprint compatibility is required and thermal headroom exceeds 25°C. |
| TPS2834PWP | Identical HTSSOP PowerPAD package and timing specs, but noninverting input logic - IN high enables HIGHDR instead of disabling it. | Requires inverted PWM signal or external inverter; incompatible with TL5001A COMP output without modification. | Choose TPS2834PWP only when interfacing with noninverted controllers (e.g., UC384x family) or where logic inversion is handled upstream. |
Compared with TPS2835D and TPS2834PWP, the TPS2835PWP uniquely combines inverting logic, PowerPAD thermal performance, and hardware CROWBAR - making it optimal for space-constrained, high-reliability synchronous buck designs where OVP response time and thermal margin are critical.
Availability
TPS2835PWP is available at Aetrix Electronics and suitable for server VRMs, industrial PLC power supplies, automotive ADAS modules, and telecom DC/DC converters requiring stable component supply, long-lifecycle support, and traceable sourcing.
Supply support for TPS2835PWP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-efficiency power conversion solutions.
The TPS2835PWP belongs to TI's synchronous MOSFET driver product line, engineered specifically for high-current, high-frequency buck regulators in computing, industrial, and automotive systems where shoot-through prevention and thermal resilience are mandatory.
FAQ
What is the key functional difference between TPS2835PWP and TPS2834PWP?
The TPS2835PWP features an inverting input logic configuration, meaning a high signal on the IN pin disables the high-side driver and enables the low-side driver - the opposite behavior of the noninverting TPS2834PWP. This allows direct connection to inverted PWM outputs like the TL5001A COMP pin without external logic inversion, reducing propagation delay and component count in the TPS2835PWP design.
Does TPS2835PWP require an external bootstrap diode?
No, the TPS2835PWP integrates an internal Schottky bootstrap diode between VCC and BOOT terminals. This eliminates the need for an external diode, simplifying layout, improving reliability, and reducing BOM cost - a confirmed feature documented in the SLVS223B datasheet Section "Detailed Description" and Terminal Functions table.
How does the CROWBAR function protect the system when used with TPS2835PWP?
When the CROWBAR pin is driven low, the TPS2835PWP immediately forces LOWDR high and disables HIGHDR regardless of IN, ENABLE, or SYNC states - clamping the output voltage by turning on the low-side FET as a synchronous rectifier. This hardware-level response acts within nanoseconds, protecting downstream loads from overvoltage caused by high-side FET shorts, as verified in the "CROWBAR" subsection of the SLVS223B datasheet.
What is the maximum allowable voltage between BOOT and PGND for TPS2835PWP?
The absolute maximum voltage between BOOT and PGND for the TPS2835PWP is 30 V, as specified in the "Absolute Maximum Ratings" table of the SLVS223B datasheet. This rating enables safe operation with high-input-voltage buck stages (e.g., 24-V or 48-V input) when using appropriate bootstrap capacitor selection and layout practices.
Can TPS2835PWP operate with a 3.3-V logic supply?
No - the TPS2835PWP requires a minimum VCC supply of 4.5 V per its recommended operating conditions. While its digital inputs (ENABLE, SYNC, CROWBAR, IN) are TTL-compatible and accept 2-V VIH, the internal driver stages and charge pump cannot function reliably below 4.5 V, and operation outside this range is not characterized or guaranteed.
TPS2835PWP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 14-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Half-Bridge
- Channel Type:
- Synchronous
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 4.5V ~ 15V
- Logic Voltage - VIL, VIH:
- 1V, 2V
- Current - Peak Output (Source, Sink):
- 2.7A, 2.4A
- Input Type:
- Inverting
- High Side Voltage - Max (Bootstrap):
- 28 V
- Rise / Fall Time (Typ):
- 50ns, 40ns
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-HTSSOP
TPS2835PWP FAQ
1.How can I place an order for TPS2835PWP through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS2835PWP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS2835PWP reliable?
The price and inventory of TPS2835PWP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS2835PWP is usually 5 days.
3.What payment methods are accepted for TPS2835PWP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS2835PWP transactions.
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4.How is shipping managed for TPS2835PWP?
TPS2835PWP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS2835PWP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS2835PWP?
For technical support, including TPS2835PWP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS2835PWP requirements.
6.How does Aetrix verify that TPS2835PWP is sourced from the original manufacturer or authorized distributors?
All TPS2835PWP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS2835PWP meets industry standards.
7.What is the process for return or replacement of TPS2835PWP?
All TPS2835PWP units undergo pre-shipment inspection (PSI). If there is an issue with TPS2835PWP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS2835PWP part is unused and in its original packaging.
Return procedure for TPS2835PWP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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