Texas Instruments TPS40120PW
- Part No.:
- TPS40120PW
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS40120PW.pdf
- Description:
- IC PROG FEEDBK DIVIDER 14-TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS40120PW from Texas Instruments is a VRM 10.x-compliant, 6-bit digitally programmable feedback divider IC designed to interface with multiphase controllers (e.g., TPS40090) having a 0.7-V internal reference. It supports 12.5-mV VID voltage steps across a 0.8375–1.600-V output range, features dual NCPU outputs for no-CPU state signaling, and operates from a 4.3–5.5-V VCC supply. It enables dynamic core voltage scaling in Intel Pentium 4/Xeon processor power supplies.
For engineers reviewing the TPS40120PW datasheet, TPS40120PW pinout, TPS40120PW application, or TPS40120PW equivalent, key selection considerations include VRM 10.x VID code compatibility, FB-to-VOUT divider accuracy (±0.5%), BIAS reference injection capability, NCPU1 open-drain and NCPU2 TTL-level output behavior, and TSSOP-14 package thermal and layout constraints.
Technical Context
The TPS40120PW implements a digitally controlled resistive feedback divider where the upper resistor is fixed and the lower resistor value is determined by a 6-bit VID code, enabling precise VREF generation per VRM 10.x specifications. Its BIAS pin injects the controller's 0.7-V reference into the divider network to improve tolerance against reference drift.
It integrates anti-skew filtering (~500 ns) on all VID inputs to prevent erroneous voltage transitions during dynamic VID code changes, supporting smooth 12.5-mV step-up/down transitions at rates up to 2.5 mV/µs. The NCPU1 (open-drain) and NCPU2 (TTL push-pull) outputs assert low upon VID = x11111, enabling coordinated power-down sequencing in multiphase CPU VRMs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VREF Range | 0.8375 V to 1.600 V in 12.5-mV steps - defines supported Intel processor core voltage setpoints per VRM 10.x. |
| VID Input Logic Thresholds | VIL = 0.3 V, VIH = 0.85 V - ensures reliable recognition of TTL-level VID codes from host processors. |
| Divider Accuracy | ±0.5% - guarantees tight regulation tolerance when used with 0.7-V reference controllers like TPS40090. |
| VCC Supply Range | 4.3 V to 5.5 V - compatible with standard 5-V system rails; excludes operation below 4.3 V to maintain functional integrity. |
| FB-to-VOUT Resistance | 7.5 kΩ to 14.5 kΩ - sets gain and stability margin of the outer voltage loop in conjunction with controller compensation. |
| Operating Temperature | –40°C to +85°C - qualified for industrial and computing environments without derating. |
| Supply Current (VCC) | 1 mA (all VID inputs low) - enables low-quiescent-power operation in always-on VRM control paths. |
Pinout & Package
TPS40120PW is housed in a 14-pin TSSOP (PW) package with 0.65-mm lead pitch, 4.4-mm body width, and 1.2-mm maximum height. The package is RoHS-compliant, moisture-sensitivity Level-1 rated, and suitable for standard reflow assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VID0–VID5 (Pins 1,2,3,4,5,6) | Digital input | Accept 6-bit VRM 10.x VID code; internal anti-skew filtering prevents glitch-induced voltage errors. |
| GND (Pin 7) | Reference node | Signal ground return for internal circuitry and FB divider path; must be low-impedance to minimize noise coupling. |
| VOUT (Pin 8) | Analog input | Connects to VRM output or TPS40090 DIFFO pin; forms top leg of programmable divider network. |
| FB (Pin 9) | Analog output | Midpoint of divider; connects to controller's error amplifier inverting input - defines regulated VREF point. |
| BIAS (Pin 10) | Analog input | Injects controller's 0.7-V reference into divider center tap to compensate for reference tolerance drift. |
| NCPU1 (Pin 12) | Digital output | Open-drain signal asserting low during VID = x11111; used to discharge soft-start capacitors or disable drivers. |
| NCPU2 (Pin 13) | Digital output | TTL-level push-pull output asserting low during VID = x11111; drives gate drivers into high-Z off-state. |
| VCC (Pin 14) | Power supply | 4.3–5.5-V supply input; powers internal logic and divider circuitry; requires local 0.1-µF bypass capacitor. |
Key Features
| Feature | Design Value |
|---|---|
| VRM 10.x compliance | Fully implements Intel VRM 10.x VID code table with 12.5-mV resolution and OFF-state detection (VID = x11111). |
| Dual NCPU signaling | Provides both open-drain (NCPU1) and TTL (NCPU2) outputs for flexible no-CPU coordination across diverse driver architectures. |
| BIAS reference injection | Allows external 0.7-V reference to be injected at FB node, improving overall VREF accuracy beyond discrete resistor limitations. |
| Anti-skew VID filtering | ~500 ns input filtering ensures glitch-free VID transitions, eliminating need for external synchronization logic in dynamic voltage scaling. |
| TSSOP-14 package | Industry-standard 14-pin thin shrink small-outline package with 0.65-mm pitch; supports automated placement and reflow. |
Applications
| Intel Pentium 4/Xeon VRM | VRM10.x Multiphase Power Supply |
|---|---|
|
Use Scenario: Core voltage regulation for desktop/server CPUs requiring dynamic VID-based voltage scaling. IC Role / Device Role / Timing Role: Programmable feedback divider that replaces discrete resistor networks to generate precise VREF from VID codes. Use Value: Enables accurate 12.5-mV VREF steps across 0.8375–1.600 V, meeting VRM 10.x specification for Intel processors. |
Use Scenario: Four-phase 105-A CPU power supply using TPS40090 controller and external MOSFETs. IC Role / Device Role / Timing Role: Interface between TPS40090's DIFFO output and FB input, providing programmable gain and NCPU coordination. Use Value: Eliminates manual resistor selection; NCPU1/NCPU2 outputs synchronize phase shutdown during VID=OFF condition. |
| Processor Core Voltage Scaling | Dynamic VID Transition Control |
|
Use Scenario: Adaptive voltage/frequency scaling (AVFS) in performance-optimized computing platforms. IC Role / Device Role / Timing Role: Digitally reconfigurable divider that responds to real-time VID commands from CPU. Use Value: Supports ≤5 µs VID code transitions with built-in anti-skew filtering, ensuring monotonic VREF ramping without overshoot. |
Use Scenario: Safe core voltage transition during processor sleep/wake cycles or thermal throttling events. IC Role / Device Role / Timing Role: Timing-critical interface ensuring correct VREF settling before enabling downstream power stages. Use Value: Internal 500-ns VID input filtering prevents metastability; NCPU outputs provide deterministic timing for driver disable. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable feedback divider applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS40090 | Integrated multiphase PWM controller with built-in 0.7-V reference and VID decoder; not a standalone divider. | Replaces entire controller + divider function; requires redesign of control loop and gate drive architecture. | Select TPS40090 only when replacing legacy discrete controller + TPS40120PW combination with single-chip solution. |
| ISL6540CRZ | VRM 10.x-compliant 6-bit VID divider with identical 12.5-mV step size but different pinout and NCPU implementation (single NCPU output). | Supports same VID codes and VREF range but lacks dual NCPU signaling; requires board-level adaptation for NCPU functionality. | Choose ISL6540CRZ only if dual NCPU outputs are unused and existing layout accommodates its 16-pin QFN package and pin mapping. |
Compared with TPS40120PW, TPS40090 integrates control logic but eliminates design flexibility, while ISL6540CRZ offers functional overlap in VID decoding but omits NCPU1/NCPU2 coordination-making TPS40120PW uniquely suited for systems requiring synchronized multi-output no-CPU signaling.
Availability
TPS40120PW is available at Aetrix Electronics and suitable for Intel VRM10.x power supplies, multiphase CPU voltage regulators, and dynamic VID-based core voltage scaling applications requiring stable component supply and long-term industrial availability.
Supply support for TPS40120PW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and power management technologies.
The TPS40120PW belongs to TI's VRM-compliant power management IC product line, engineered specifically to simplify and enhance the accuracy of programmable voltage regulation in Intel processor power delivery systems.
FAQ
What is the primary function of the TPS40120PW in a CPU power supply?
The TPS40120PW serves as a VRM 10.x-compliant, 6-bit digitally programmable feedback divider that generates precise reference voltages (0.8375–1.600 V in 12.5-mV steps) from VID codes sent by Intel Pentium 4/Xeon processors. It interfaces between the VRM output and the controller's FB pin, replacing discrete resistor networks to enable dynamic core voltage scaling. Its BIAS pin allows injection of the controller's 0.7-V reference to improve accuracy, and it is integral to the TPS40120PW-based power architecture.
How does the TPS40120PW handle VID code transitions to prevent voltage glitches?
The TPS40120PW incorporates internal anti-skew circuitry with approximately 500 ns of filtering on all VID inputs (VID0–VID5), ensuring that asynchronous or noisy VID code changes do not produce erroneous VREF values. This filtering supports clean 12.5-mV upward/downward transitions at rates up to 2.5 mV/µs without external synchronization logic. The TPS40120PW thus maintains stable regulation during dynamic voltage scaling events such as processor frequency changes or thermal throttling.
What is the role of the NCPU1 and NCPU2 pins on the TPS40120PW?
NCPU1 (Pin 12) is an open-drain output that asserts low when VID = x11111 (no-CPU state), commonly used to discharge soft-start capacitors or disable bias circuits. NCPU2 (Pin 13) is a TTL-level push-pull output that also asserts low under the same condition, enabling direct control of gate drivers to place the VRM output in high-impedance shutdown. Together, they provide coordinated, robust no-CPU signaling - a key feature distinguishing the TPS40120PW from simpler VID dividers.
Can the TPS40120PW be used with controllers other than the TPS40090?
Yes, the TPS40120PW is compatible with any multiphase or single-phase PWM controller featuring a 0.7-V internal reference and FB-based voltage regulation, provided the controller supports external VID decoding or delegates VID interpretation to the TPS40120PW. It has been validated with TPS40090, TPS40130, and similar architectures. The TPS40120PW's BIAS pin allows reference injection even if the controller's reference exhibits tolerance drift, enhancing interoperability across compatible platforms.
What package type and assembly details apply to the TPS40120PW?
The TPS40120PW uses a 14-pin TSSOP (PW) package with 0.65-mm lead pitch, 4.4-mm body width, and 1.2-mm maximum height. It is RoHS-compliant, moisture-sensitivity Level-1 rated (260°C peak reflow, unlimited floor life), and supplied in tubes (90 pcs) or tape-and-reel (2000 pcs). The pin 1 index area is marked "40120", and recommended PCB land patterns follow IPC-7351 guidelines for PW0014A outline - critical for solder joint reliability in the TPS40120PW's thermal and electrical performance.
TPS40120PW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Applications:
- Multiphase Controller
- Current - Supply:
- 1mA
- Voltage - Supply:
- 4.3V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
TPS40120PW FAQ
1.How can I place an order for TPS40120PW through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS40120PW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS40120PW reliable?
The price and inventory of TPS40120PW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS40120PW is usually 5 days.
3.What payment methods are accepted for TPS40120PW?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS40120PW transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS40120PW?
TPS40120PW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS40120PW order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS40120PW?
For technical support, including TPS40120PW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS40120PW requirements.
6.How does Aetrix verify that TPS40120PW is sourced from the original manufacturer or authorized distributors?
All TPS40120PW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS40120PW meets industry standards.
7.What is the process for return or replacement of TPS40120PW?
All TPS40120PW units undergo pre-shipment inspection (PSI). If there is an issue with TPS40120PW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS40120PW part is unused and in its original packaging.
Return procedure for TPS40120PW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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