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Texas Instruments TPS61121PWRG4
- Part No.:
- TPS61121PWRG4
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS61121PWRG4.pdf
- Description:
- IC BOOST CONV DUAL-OUT 16-TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:3,497
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Product details
Overview
TPS61121PWRG4 from Texas Instruments is a synchronous boost converter with integrated 200-mA LDO, designed for single-cell Li-Ion/Li-Polymer or dual–quadruple alkaline/NiMH battery-powered portable systems. It delivers fixed 3.3-V DC-DC output at ≥250 mA and fixed 1.5-V LDO output at ≥120 mA from 1.8-V input, with 95% peak efficiency, 500-kHz PWM operation, and 40-µA quiescent current.
For engineers reviewing the TPS61121PWRG4 datasheet, TPS61121PWRG4 pinout, TPS61121PWRG4 application, or TPS61121PWRG4 equivalent, this device supports dual-output power management in space-constrained MP3 players, PDAs, and USB-powered instrumentation where low-battery detection, power-good signaling, and load disconnect during shutdown are critical design requirements.
Technical Context
The TPS61121PWRG4 implements a fixed-frequency (500 kHz), multiple feed-forward PWM controller that monitors VIN, VOUT, and NMOS switch voltage drop to dynamically adjust duty cycle-bypassing slow error-amplifier loop response. Peak switch current is internally limited to 1300 mA (typ), with thermal shutdown at 140°C and 20°C hysteresis.
Its dual-ground architecture separates control ground (GND) from power ground (PGND) to prevent ground shift under high switching currents. The integrated antiringing switch clamps SW node ringing during discontinuous conduction mode, reducing radiated EMI without external snubbers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DC-DC Output Voltage | Fixed 3.3 V ±3% - enables direct powering of 3.3-V microcontrollers and interfaces without external feedback resistors |
| LDO Output Voltage | Fixed 1.5 V ±3% - supplies low-voltage analog circuitry or memory I/O independently of boost stage status |
| Input Voltage Range | 1.8 V to 5.5 V - supports full discharge curve of one-cell Li-Ion (2.5–4.2 V) and two-cell alkaline (2.0–3.2 V) |
| Max DC-DC Output Current | ≥250 mA at 3.3 V, VIN = 1.8 V - sustains operation down to near-end-of-life battery voltage |
| Total Quiescent Current | 40 µA (typ) - extends battery runtime in standby modes of portable devices |
| Switch Current Limit | 1300 mA (typ) - ensures robust startup into capacitive loads and short-circuit tolerance |
| Power-Good Threshold | 92% of VOUT (3.04 V at 3.3 V) - provides reliable enable/disable sequencing for downstream regulators or processors |
Pinout & Package
TPS61121PWRG4 is housed in a thermally enhanced 16-pin TSSOP package (5.00 mm × 4.40 mm) with exposed thermal pad (GND-connected). Pin 1 is SWP; pin 16 is VOUT. GND and PGND must be connected at a single point near pin 12 to maintain signal integrity and minimize noise coupling.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN (Pin 7) | DC-DC enable input | Active-high logic control: ties to system MCU GPIO to disable boost stage and fully disconnect load from battery |
| LDOEN (Pin 8) | LDO enable input | Independent active-high control: allows LDO to remain active even when boost stage is shut down |
| PGOOD (Pin 14) | Open-drain power-good output | Sinks current when VOUT is within 92–95% of nominal-used to enable sequenced rails or assert processor reset |
| LBI (Pin 5) | Low-battery comparator input | Accepts scaled battery voltage; triggers LBO when input drops below 500 mV (±10 mV hysteresis) |
| LBO (Pin 13) | Open-drain low-battery output | Asserts low when battery voltage falls below programmed threshold-connects to MCU interrupt or LED driver |
| SWP (Pin 1) / SWN (Pin 2) | Boost switch terminals | Drive external 10-µH inductor; SWP connects to inductor top, SWN to diode/switch node-requires tight layout to minimize EMI |
| VOUT (Pin 16) | DC-DC regulated output | Delivers fixed 3.3 V; requires ≥100-µF low-ESR output capacitor for stability under dynamic load |
| LDOOUT (Pin 10) | LDO regulated output | Delivers fixed 1.5 V; decoupled with 2.2-µF ceramic capacitor placed adjacent to pin |
Key Features
| Feature | Design Value |
|---|---|
| Synchronous rectification | Replaces Schottky diode with integrated PMOS switch-achieves 95% peak efficiency and eliminates forward voltage drop losses |
| Load disconnect during shutdown | Backgate control isolates VOUT from VBAT when EN = low-prevents battery drain with zero external components |
| Integrated antiringing switch | Clamps SW node to VBAT during DCM-reduces radiated EMI without snubber networks or ferrite beads |
| Separate GND/PGND pins | Prevents control-loop corruption from high di/dt switching currents-ensures stable regulation under transient load steps |
| Programmable low-battery detection | LBI input accepts resistor divider from battery-enables precise end-of-discharge warning before system brownout |
Applications
| MP3 Player Power Management | PDA System Rail Generation |
|---|---|
Use Scenario: Portable audio player powered by single-cell Li-Ion battery requiring stable 3.3-V MCU core supply and 1.5-V codec bias rail across full battery discharge range (4.2 V → 2.8 V). IC Role / Device Role / Timing Role: Dual-output power manager providing primary boost-regulated 3.3 V and secondary LDO-regulated 1.5 V with independent enable control and battery health monitoring. Use Value: Eliminates need for discrete boost + LDO + supervisor ICs-reduces BOM count by 3 devices and PCB area by >25 mm² while maintaining <3% output regulation. |
Use Scenario: Handheld PDA with ARM processor, touchscreen controller, and SRAM requiring sequenced 3.3-V I/O and 1.5-V memory interface rails with power-good confirmation and low-battery alert. IC Role / Device Role / Timing Role: Centralized power sequencer delivering synchronized outputs, PGOOD assertion after regulation, and LBO interrupt for graceful OS shutdown. Use Value: Enables deterministic power-up timing and safe battery-aware shutdown-prevents data corruption during unexpected power loss. |
| USB-Powered Instrumentation | Dual-Input Portable Monitor |
Use Scenario: Battery-backed field instrument that operates from USB (5 V) or internal Li-Ion (3.7 V nominal), requiring clean 3.3-V analog front-end and 1.5-V sensor bias regardless of source. IC Role / Device Role / Timing Role: Dual-input capable regulator using LDOIN tied to USB rail or battery-LDO remains active during boost shutdown for continuous analog bias. Use Value: Supports seamless source transition without rail collapse-maintains sensor calibration and ADC reference stability during switchover. |
Use Scenario: Portable LCD monitor with integrated battery and wall adapter input, needing isolated 3.3-V display logic and 1.5-V backlight driver with independent fault reporting. IC Role / Device Role / Timing Role: Dual-rail generator with separate EN/LDOEN controls and open-drain PGOOD/LBO outputs for independent system-level fault handling. Use Value: Allows display subsystem to remain powered via LDO while main logic shuts down-enables instant-on resume from low-power state. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output boost+LDO applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS61122PW | Fixed 3.6-V DC-DC output and 3.3-V LDO output-higher main rail voltage, no 1.5-V option | Suitable for systems requiring 3.6-V FPGA I/O or 3.3-V peripherals but incompatible with 1.5-V analog circuits | Select when main system rail must be ≥3.6 V and LDO output matches peripheral supply needs |
| MAX8647ETE+ | 3.3-V boost + 1.2-V LDO in 16-pin TQFN; lower quiescent current (25 µA) but 800-mA switch limit | Better suited for ultra-low-power sensor nodes with <120 mA load, less robust for high-current bursts | Choose for extended battery life in always-on monitoring devices where peak current ≤800 mA |
Compared with TPS61121PWRG4, TPS61122PW raises the primary output to 3.6 V and shifts LDO to 3.3 V-making it unsuitable for 1.5-V analog rails-while MAX8647ETE+ trades switch current headroom (800 mA vs 1300 mA) for lower quiescent consumption, limiting use in burst-load applications like audio amplification.
Availability
TPS61121PWRG4 is available at Aetrix Electronics and suitable for MP3 players, PDAs, and USB-powered instrumentation requiring stable component supply, long-term lifecycle support, and guaranteed traceability for medical and industrial deployments.
Supply support for TPS61121PWRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with over 50 years of innovation in energy-efficient power conversion.
The TPS6112x product line was engineered specifically for portable battery-powered equipment needing compact, high-efficiency dual-rail generation-addressing the system-level challenge of extending runtime while minimizing board space and external component count.
FAQ
What is the maximum output current capability of the TPS61121PWRG4 at 3.3 V with 1.8-V input?
The TPS61121PWRG4 delivers ≥250 mA at 3.3 V output when supplied from 1.8 V input, as verified in Figure 3 of the SLVS427D datasheet. This performance is sustained across –40°C to 85°C ambient temperature and accounts for worst-case efficiency and thermal derating in the TSSOP package.
Does the TPS61121PWRG4 require external feedback resistors for its 3.3-V DC-DC output?
No, the TPS61121PWRG4 features an internally trimmed 3.3-V DC-DC output-no external FB resistors are needed. The FB pin (Pin 15) is unused in this fixed-output variant and should be left unconnected or tied to GND per TI design guidelines.
How does the TPS61121PWRG4 handle battery disconnection during shutdown?
The TPS61121PWRG4 uses backgate control to isolate the LDO and boost outputs from VBAT when EN is low. This active load disconnect prevents battery drain-measured at ≤1 µA shutdown current-without requiring external MOSFETs or ideal diodes.
Can the LDO stage of the TPS61121PWRG4 be powered directly from a USB 5-V rail?
Yes, the LDOIN pin accepts input voltages from 1.8 V to 7 V. Connecting USB 5 V to LDOIN (with LDOEN high) enables the 1.5-V LDO output independently of the boost stage-allowing hybrid power architectures where USB powers analog circuitry while battery powers digital logic.
What is the function of the SKIPEN pin on the TPS61121PWRG4?
The SKIPEN pin enables or disables power-save mode: when high, the TPS61121PWRG4 enters pulse-skipping at light loads to maintain >85% efficiency down to 1 mA; when low, it forces continuous 500-kHz PWM operation for lower output ripple and predictable EMI profile.
TPS61121PWRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Handheld/Mobile Devices
- Current - Supply:
- 10µA
- Voltage - Supply:
- 1.8V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
TPS61121PWRG4 FAQ
1.How can I place an order for TPS61121PWRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS61121PWRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS61121PWRG4 reliable?
The price and inventory of TPS61121PWRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS61121PWRG4 is usually 5 days.
3.What payment methods are accepted for TPS61121PWRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS61121PWRG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS61121PWRG4?
TPS61121PWRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS61121PWRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS61121PWRG4?
For technical support, including TPS61121PWRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS61121PWRG4 requirements.
6.How does Aetrix verify that TPS61121PWRG4 is sourced from the original manufacturer or authorized distributors?
All TPS61121PWRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS61121PWRG4 meets industry standards.
7.What is the process for return or replacement of TPS61121PWRG4?
All TPS61121PWRG4 units undergo pre-shipment inspection (PSI). If there is an issue with TPS61121PWRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS61121PWRG4 part is unused and in its original packaging.
Return procedure for TPS61121PWRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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