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Texas Instruments TPS61122PW

Part No.:
TPS61122PW
Manufacturer:
Texas Instruments
Category:
Power Management - Specialized
Package:
16-TSSOP (0.173", 4.40mm Width)
Datasheet:
AetrixTPS61122PW.pdf
Description:
IC BOOST CONV DUAL-OUT 16-TSSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:3,139

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Product details

Overview

TPS61122PW from Texas Instruments is a synchronous boost converter with integrated 3.3-V LDO, designed for dual-output power management in single-cell Li-Ion or multi-cell alkaline/NiMH battery systems. It delivers up to 500 mA at 3.6 V from 1.8–5.5 V input, features 40-µA quiescent current, 95% peak efficiency, and includes power-good, low-battery detection, and load disconnect during shutdown - used in portable audio, PDAs, and USB-powered instrumentation.

For engineers reviewing the TPS61122PW datasheet, TPS61122PW pinout, TPS61122PW application, or TPS61122PW equivalent, key selection considerations include its fixed 3.6-V boost output + 3.3-V LDO, TSSOP-16 package thermal performance (RθJA = 100.5°C/W), synchronous rectification architecture, and dual enable control (EN/LDOEN) enabling independent stage sequencing in battery-backed systems.

Technical Context

The TPS61122PW implements a fixed-frequency (500 kHz typical), multiple feed-forward PWM controller that monitors VIN, VOUT, and NMOS switch voltage drop to directly adjust duty cycle-bypassing slow error-amplifier loop response. Peak switch current is internally limited to 1300 mA (typ), with overtemperature protection activating at 140°C.

Its dual-ground architecture separates PGND (power ground for SWN/SWP/PGOOD) from GND (logic/control reference), minimizing noise coupling. The integrated antiringing switch clamps SW node ringing during discontinuous conduction mode, reducing EMI without external snubbers.

Key Specifications

Parameter Value and Actual Design Meaning
Boost Output Voltage Fixed 3.6 V - eliminates external feedback resistors; stable across 1.8–5.5 V input and −40°C to 85°C ambient.
LDO Output Voltage Fixed 3.3 V - derived from VOUT or VBAT; supports back-bias operation and independent enable via LDOEN pin.
Max Boost Output Current 500 mA at 3.6 V - achievable down to 1.8 V input; enables driving moderate-power peripherals like LCD bias or RF modules.
Quiescent Current 40 µA typical total device - extends battery life in always-on monitoring circuits without compromising startup responsiveness.
Switch Current Limit 1300 mA typical - sets inductor sizing and short-circuit robustness; limits peak inductor current during startup and overload.
Efficiency 95% peak - achieved via synchronous N/P-MOSFET rectification; reduces thermal load in compact TSSOP-16 layout.
Thermal Resistance RθJA = 100.5°C/W (TSSOP-16) - defines maximum power dissipation before junction exceeds 125°C at 85°C ambient.

Pinout & Package

TPS61122PW uses a 16-pin TSSOP package (5.00 mm × 4.40 mm) with exposed thermal pad not connected in this variant; requires standard PCB footprint per TI SLVS427D.

Pin/Terminal Circuit Role Design Meaning
EN (Pin 7) DC-DC enable input Active-high logic control; disables boost stage and disconnects load from VBAT when low - critical for system-level power sequencing.
LDOEN (Pin 8) LDO enable input Independent active-high control of LDO stage; referenced to LDOIN - allows LDO to remain active even if boost is disabled.
VOUT (Pin 16) Boost output Main regulated 3.6-V supply rail; powers high-efficiency loads; connects to LDOIN for post-regulated 3.3-V output.
LDOOUT (Pin 10) LDO output Stable 3.3-V rail with ±3% accuracy; supplies noise-sensitive analog or logic circuits requiring tighter regulation than boost alone.
PGOOD (Pin 14) Power-good indicator Open-drain output signaling VOUT within 92%–95% of nominal; used to enable downstream regulators or assert microcontroller reset.
LBI (Pin 5) Low-battery comparator input Monitors scaled battery voltage; triggers LBO when input drops below 500 mV (10 mV hysteresis) - enables graceful system shutdown.
GND (Pin 12) Logic ground Reference for EN, SKIPEN, LDOEN, FB, and internal control circuitry - must be star-connected near thermal pad for noise immunity.
PGND (Pin 3) Power ground Return path for SWN, SWP, PGOOD, and high-current LDOOUT - separate from GND to prevent switching noise injection into control loop.

Key Features

Feature Design Value
Synchronous rectification Replaces Schottky diode with low-RDS(on) PMOS switch - achieves 95% efficiency and eliminates forward-voltage loss at light loads.
Load disconnect on shutdown Special backgate control isolates VBAT from VOUT/LDOOUT when EN = low - prevents battery drain during storage or standby.
Integrated antiringing switch Clamps SW node to VBAT during DCM - suppresses high-frequency ringing without external components, reducing EMI by >10 dB.
Independent dual enable Separate EN (boost) and LDOEN (LDO) pins allow staggered power-up/down sequencing - essential for FPGA or MCU core/I/O rail ordering.
Low-battery detection Programmable threshold via LBI resistor divider; LBO open-drain output drives interrupt or LED - enables predictive battery management.

Applications

Portable Audio Playback USB-Powered Instrumentation

Use Scenario: MP3 player powered by single-cell Li-Ion (2.7–4.2 V) requiring clean 3.3-V logic supply and 3.6-V display bias.

IC Role / Device Role / Timing Role: Dual-output power manager providing isolated, sequenced rails: 3.6-V boost for OLED backlight driver and 3.3-V LDO for codec/DSP.

Use Value: Eliminates need for discrete boost + LDO ICs; 40-µA quiescent current extends playback time; PGOOD enables safe audio codec initialization.

Use Scenario: Handheld multimeter drawing power from USB 5-V bus or internal alkaline cells, needing stable 3.3-V MCU core and 3.6-V ADC reference.

IC Role / Device Role / Timing Role: Input-flexible regulator accepting 1.8–5.5 V; uses USB 5 V as LDOIN source while boosting lower battery voltages to 3.6 V.

Use Value: Seamless source switchover without firmware intervention; LDO back-bias capability allows concurrent USB/battery operation.

PDA System Power Low-Power Sensor Node

Use Scenario: Palm-sized PDA with ARM processor, touchscreen controller, and SD card interface - all requiring tightly regulated 3.3-V I/O and 3.6-V analog supply.

IC Role / Device Role / Timing Role: Central power hub delivering two independent, low-noise rails; LDO filters switching noise from boost stage for analog subsystems.

Use Value: PSRR >60 dB at 100 kHz (per TPS61121 data) ensures clean ADC reference; SKIPEN pin enables power-save mode during idle periods.

Use Scenario: Battery-operated environmental sensor node transmitting data via BLE, requiring ultra-low sleep current and fast wake-up response.

IC Role / Device Role / Timing Role: Primary power IC enabling deep-sleep mode: EN and LDOEN both disabled, drawing only 0.2 µA shutdown current from VBAT.

Use Value: 0.2 µA DC-DC shutdown current minimizes self-discharge; thermal shutdown (140°C) protects against enclosure overheating in sealed enclosures.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output boost+LDO applications.

Alternative Part Technical Difference Application Difference Selection Advice
TPS61121PW Fixed 3.3-V boost output + 1.5-V LDO; same pinout and control logic. Targets systems needing lower LDO voltage for core logic (e.g., 1.5-V FPGA banks) instead of 3.3-V peripherals. Select when 1.5-V second rail is required; not interchangeable due to different LDO output voltage and feedback network.
TPS61222DRVR Single-output boost (3.3 V) in 6-pin WSON; no integrated LDO; 2.5-µA IQ; 1-A switch. Used where space constraints prohibit TSSOP-16 and LDO is implemented externally or omitted. Choose for minimal footprint and lowest quiescent current; requires external LDO and increases BOM count and layout complexity.

Compared with TPS61122PW, TPS61121PW provides identical functionality but targets 1.5-V LDO loads, while TPS61222DRVR trades integration for size and ultra-low IQ - making TPS61122PW optimal for space-constrained dual-rail designs requiring no external LDO components.

Availability

TPS61122PW is available at Aetrix Electronics and suitable for portable audio devices, USB-powered test equipment, and handheld PDAs requiring stable component supply with full lifecycle support and traceable sourcing.

Supply support for TPS61122PW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in battery-powered system solutions.

The TPS6112x product line was designed specifically for portable electronics requiring dual regulated outputs from single- or multi-cell batteries - emphasizing high efficiency, low quiescent current, and seamless power-source transition.

FAQ

What is the fixed output voltage configuration of the TPS61122PW?

The TPS61122PW features a fixed 3.6-V boost output and a fixed 3.3-V LDO output - both internally trimmed and requiring no external feedback resistors. This configuration is confirmed in Table 1 of the SLVS427D datasheet and simplifies design for applications needing these exact rails, such as LCD bias and MCU I/O supply.

Does the TPS61122PW support independent enable control for its boost and LDO stages?

Yes, the TPS61122PW provides fully independent enable control: EN (Pin 7) controls the boost converter, while LDOEN (Pin 8) controls the LDO stage. Their logic thresholds are referenced to VBAT and LDOIN respectively, allowing asynchronous power sequencing - for example, enabling the LDO before the boost stage to power auxiliary circuitry.

How does the TPS61122PW handle battery discharge and shutdown behavior?

When EN is pulled low, the TPS61122PW halts switching, disables internal control circuitry including the low-battery comparator, and actively disconnects the load from VBAT using a dedicated backgate control circuit - reducing shutdown current to 0.2 µA and preventing battery drain during storage or system sleep.

What thermal performance can be expected from the TPS61122PW in TSSOP-16 package?

The TPS61122PW in TSSOP-16 has a junction-to-ambient thermal resistance (RθJA) of 100.5°C/W. At 85°C ambient and 125°C max junction temperature, this allows ~0.4 W of continuous power dissipation - sufficient for 500-mA output at 3.6 V with typical efficiency, provided standard 2-oz copper and thermal vias are used per TI layout guidelines.

Can the TPS61122PW operate from a USB 5-V input source?

Yes, the TPS61122PW accepts input voltages from 1.8 V to 5.5 V, making it compatible with USB 5-V sources. In this configuration, the LDO can be powered directly from USB (via LDOIN) while the boost stage remains inactive, or the boost can be disabled and the LDO used as a low-dropout post-regulator for noise-sensitive loads.

TPS61122PW Specifications

Product attributes
Attribute value
Manufacturer:
Texas Instruments
Series:
-
Package/Case:
16-TSSOP (0.173", 4.40mm Width)
Packaging:
Bulk
Product Status:
Obsolete
Applications:
Handheld/Mobile Devices
Current - Supply:
10µA
Voltage - Supply:
1.8V ~ 5.5V
Operating Temperature:
-40°C ~ 85°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
16-TSSOP

TPS61122PW FAQ

1.How can I place an order for TPS61122PW through Aetrix?

Please submit a Request for Quotation (RFQ) for TPS61122PW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TPS61122PW reliable?

The price and inventory of TPS61122PW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS61122PW is usually 5 days.

3.What payment methods are accepted for TPS61122PW?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS61122PW transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for TPS61122PW?

TPS61122PW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your TPS61122PW order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TPS61122PW?

For technical support, including TPS61122PW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS61122PW requirements.

6.How does Aetrix verify that TPS61122PW is sourced from the original manufacturer or authorized distributors?

All TPS61122PW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS61122PW meets industry standards.

7.What is the process for return or replacement of TPS61122PW?

All TPS61122PW units undergo pre-shipment inspection (PSI). If there is an issue with TPS61122PW, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TPS61122PW part is unused and in its original packaging.

Return procedure for TPS61122PW:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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