Texas Instruments TPS650001RTET
- Part No.:
- TPS650001RTET
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 16-WFQFN Exposed Pad
- Datasheet:
-
TPS650001RTET.pdf
- Description:
- IC CONV STP-DWN 2.25MHZ DL 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:240
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Product details
Overview
TPS650001RTET from Texas Instruments is a highly integrated power management IC (PMIC) for portable systems, combining a 600-mA step-down DC-DC converter, two fixed-output LDO regulators (VLDO1 = 3.3 V, VLDO2 = 1.8 V), and spread-spectrum clock generation. It operates from 2.3 V to 6 V input, delivers up to 300 mA per LDO, and features 2.25-MHz fixed-frequency PWM operation with PFM mode at light load. It is used in smartphone baseband processors requiring tightly regulated, low-noise dual-rail supplies.
For engineers reviewing the TPS650001RTET datasheet, TPS650001RTET pinout, TPS650001RTET application, or TPS650001RTET equivalent, key selection criteria include its 3-mm × 3-mm 16-pin WQFN package, fixed 1.2-V DC-DC output, independent LDO enables, PG signal for power sequencing, and absence of supply voltage supervisor (unlike TPS65001).
Technical Context
The TPS650001RTET implements a synchronous buck converter with internal high- and low-side MOSFETs (RDS(on) = 240 mΩ / 185 mΩ), feedback-controlled via FB_DCDC pin referencing a 0.6-V internal bandgap. Its MODE pin selects between automatic PWM/PFM transition or forced PWM operation, enabling efficiency optimization across 10 μA–600 mA load range.
Each LDO uses separate input pins (VINLDO1/VINLDO2), dedicated enable inputs (EN_LDO1/EN_LDO2), and feedback pins (FB_LDO1/FB_LDO2) - though output voltages are factory-fixed (3.3 V and 1.8 V), eliminating external resistor networks. The device lacks RST, MR, TRST, and RSTSNS pins, confirming absence of supply voltage supervisor functionality.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DC-DC Output | Fixed 1.2 V, ±1.5% accuracy in PWM mode - enables direct core supply for 1.2-V logic domains without external resistors. |
| DC-DC Current | 600 mA max continuous output - sufficient for baseband processor cores or FPGA I/O banks. |
| LDO1 Output | Fixed 3.3 V, 300 mA - powers USB PHY, SD card interface, or analog front-end circuitry. |
| LDO2 Output | Fixed 1.8 V, 300 mA - supplies memory I/O (e.g., LPDDR2 SDRAM) or digital audio codecs. |
| Switching Frequency | 2.25 MHz nominal with spread-spectrum modulation - reduces EMI peak emissions for FCC/CE compliance in handheld enclosures. |
| Input Voltage Range | 2.3 V to 6 V for DC-DC; 1.6 V to 6 V for LDOs - supports single-cell Li-ion (2.7–4.2 V) or dual-cell alkaline inputs. |
| Quiescent Current | 23–32 μA (MODE low, EN_DCDC high, LDOs disabled) - extends battery runtime in standby states. |
Pinout & Package
TPS650001RTET is housed in a 3.00 mm × 3.00 mm, 16-pin WQFN package (RTE) with exposed thermal pad. Pin numbering follows top-view orientation with pin 1 at top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 EN_LDO1 | Digital input | Active-high enable for 3.3-V LDO; must be pulled high to activate VLDO1 output. |
| 2 EN_LDO2 | Digital input | Active-high enable for 1.8-V LDO; independent control allows staggered power-up sequencing. |
| 3 PG | Open-drain output | Active-low power-good signal indicating regulation status of all enabled rails (DC-DC + both LDOs). |
| 4 PGND | Power ground | High-current return path for DC-DC switch node and LDO pass elements; tied to exposed thermal pad. |
| 5 SW | Switch node | Connection point for external 2.2-μH inductor; carries high di/dt switching current. |
| 6 VINDCDC | DC-DC input | Main input for buck converter and internal control blocks; requires 10-μF ceramic capacitor. |
| 7 MODE | Digital input | Selects operating mode: low = auto PWM/PFM, high = forced PWM for noise-sensitive applications. |
| 8 EN_DCDC | Digital input | Active-high enable for DC-DC converter; controls startup timing and power-down discharge. |
| 9 FB_DCDC | Analog input | Feedback node for DC-DC output; internally connected to 1.2-V divider - no external resistors needed. |
| 10 AGND | Analog ground | Reference for FB pins and internal bandgap; must be routed separately from PGND and tied near IC. |
| 11 FB_LDO1 | Analog input | Internally tied to 3.3-V reference - no external components required for fixed LDO1 output. |
| 12 VLDO1 | Output | 3.3-V regulated output; capable of 300 mA with <370-mV dropout at full load. |
| 13 VINLDO1 | Input | Input supply for LDO1; may be connected to VINDCDC or separate 3.6–5.5-V rail. |
| 14 VLDO2 | Output | 1.8-V regulated output; optimized for low-noise digital I/O with 40-dB PSRR at 1 kHz. |
| 15 VINLDO2 | Input | Input supply for LDO2; supports 1.6–6 V, enabling direct battery connection or post-regulated source. |
| 16 FB_LDO2 | Analog input | Internally tied to 1.8-V reference - confirms fixed-output configuration without external feedback. |
Key Features
| Feature | Design Value |
|---|---|
| Synchronous Buck Topology | Integrated high- and low-side MOSFETs eliminate external diode and reduce board area by >30% vs asynchronous designs. |
| Spread-Spectrum Clocking | Modulates 2.25-MHz switching frequency to lower EMI peaks by up to 10 dB, easing radiated emissions certification. |
| Independent LDO Enables | EN_LDO1 and EN_LDO2 allow precise power sequencing - e.g., delay VLDO2 activation until VLDO1 stabilizes. |
| Power-Good Monitoring | PG pin asserts low only when *all* enabled rails (DC-DC, VLDO1, VLDO2) are within ±5% regulation - critical for safe processor reset. |
| Low Quiescent Current | 23 μA typical in DC-DC active / LDOs disabled state - extends shelf life and standby time in always-on IoT nodes. |
Applications
| Smartphone Baseband Power | Embedded ARM Cortex-A/M Core Supply |
|---|---|
Use Scenario: Powers application processor SoC requiring 1.2-V core, 3.3-V peripheral I/O, and 1.8-V memory interface from single Li-ion cell. IC Role / Device Role / Timing Role: Single-chip PMIC delivering three regulated rails with coordinated sequencing and PG monitoring. Use Value: Eliminates need for discrete DC-DC + dual LDOs, reducing BOM count by 7+ components and PCB area by 25 mm². | Use Scenario: Supplies TI AM335x or NXP i.MX6ULL processor in industrial HMI with strict thermal and EMI limits. IC Role / Device Role / Timing Role: Primary power source managing core voltage ramp, I/O rail enable timing, and brownout detection via PG. Use Value: 2.25-MHz SSC operation meets CISPR-22 Class B radiated emissions without shielding or ferrites. |
| Portable Medical Sensor Hub | Wearable Fitness Tracker |
Use Scenario: Powers ECG analog front-end (3.3 V), MCU core (1.2 V), and flash memory interface (1.8 V) in battery-operated diagnostic device. IC Role / Device Role / Timing Role: Central power manager ensuring clean, sequenced supplies to mixed-signal subsystems. Use Value: 40-dB PSRR at 1 kHz on LDO2 suppresses switching noise from DC-DC, preserving ADC SNR >85 dB. | Use Scenario: Delivers regulated rails to Nordic nRF52840 SoC (1.2 V core, 3.3 V radio, 1.8 V sensor interface) from 3.7-V Li-Po. IC Role / Device Role / Timing Role: Ultra-low-IQ PMIC enabling multi-week battery life in sleep mode with fast wake-up response. Use Value: 23 μA quiescent current extends 120-mAh battery life to >180 days in deep-sleep state. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS650003RTET | DC-DC output fixed at 1.5 V; LDO1 = 1.8 V, LDO2 = 3.3 V - swapped LDO assignments and higher DC-DC voltage. | Targets 1.5-V core logic (e.g., older DSPs) and peripherals needing 3.3 V before 1.8 V - incompatible sequencing for 1.2-V SoCs. | Select only if system requires 1.5-V DC-DC and reversed LDO voltage order; not drop-in compatible. |
| TPS650006RTET | DC-DC output fixed at 1.2 V (same as TPS650001RTET); LDO1 = 3.3 V, LDO2 = 1.8 V (same); but lacks SSC generator - no spread-spectrum capability. | Used where EMI is less constrained (e.g., non-certified lab equipment); higher peak EMI may require additional filtering. | Choose when SSC is unnecessary and lowest possible cost is prioritized; identical pinout and electrical behavior except EMI performance. |
Compared with TPS650001RTET, TPS650003RTET shifts DC-DC and LDO voltages to serve different core/peripheral voltage hierarchies, while TPS650006RTET removes spread-spectrum clocking to reduce cost - making TPS650001RTET the optimal choice for EMI-sensitive 1.2-V SoC designs requiring fixed dual-LDO outputs.
Availability
TPS650001RTET is available at Aetrix Electronics and suitable for smartphone baseband power, embedded ARM processor supply, and portable medical sensor hub applications requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for TPS650001RTET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with over 90 years of innovation in energy-efficient electronics.
The TPS6500xx family was designed specifically for space-constrained portable devices needing compact, multi-rail power solutions - emphasizing integration, low quiescent current, and EMI reduction without sacrificing flexibility.
FAQ
What is the DC-DC output voltage of the TPS650001RTET?
The TPS650001RTET has a fixed 1.2-V DC-DC output voltage with ±1.5% accuracy in PWM mode. This value is factory-trimmed and requires no external feedback resistors - confirmed in the Device Options table and Electrical Characteristics section of the SLVS810C datasheet. The TPS650001RTET does not support adjustable DC-DC output.
Does the TPS650001RTET include a supply voltage supervisor (SVS)?
No, the TPS650001RTET does not include a supply voltage supervisor. Per the Device Options table in the SLVS810C datasheet, SVS is marked "N/A" for TPS650001RTET, unlike the TPS65001 which includes RST, MR, TRST, and RSTSNS pins. The TPS650001RTET pinout omits these signals entirely, confirming SVS absence.
What package type and dimensions does the TPS650001RTET use?
The TPS650001RTET uses a 3.00 mm × 3.00 mm, 16-pin WQFN package with exposed thermal pad (RTE package code). This is explicitly stated in the Device Information table and Mechanical, Packaging, and Orderable Information section of the SLVS810C datasheet, and matches the pin configuration shown in Figure 7 (16-Pin WQFN).
Can the LDO outputs of the TPS650001RTET be adjusted externally?
No, the LDO outputs of the TPS650001RTET are factory-fixed: VLDO1 = 3.3 V and VLDO2 = 1.8 V. The datasheet states "LDO1 = 3.3 V fixed, LDO2 = 1.8 V fixed" in the Device Options table, and the FB_LDO1/FB_LDO2 pins are internally connected - no external resistor networks are supported or required.
What is the maximum continuous output current for each LDO in the TPS650001RTET?
Each LDO in the TPS650001RTET delivers up to 300 mA continuous output current. This is specified in the Features section ("LDO1 300mA / LDO2 300mA"), confirmed in Section 8.3 Recommended Operating Conditions (IO = 300 mA), and validated in the Electrical Characteristics table under "Continuous Pass FET Current".
TPS650001RTET Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Handheld/Mobile Devices
- Current - Supply:
- -
- Voltage - Supply:
- 2.3V ~ 6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-WQFN (3x3)
TPS650001RTET FAQ
1.How can I place an order for TPS650001RTET through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS650001RTET on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS650001RTET reliable?
The price and inventory of TPS650001RTET are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS650001RTET is usually 5 days.
3.What payment methods are accepted for TPS650001RTET?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS650001RTET transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS650001RTET?
TPS650001RTET orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS650001RTET order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS650001RTET?
For technical support, including TPS650001RTET datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS650001RTET requirements.
6.How does Aetrix verify that TPS650001RTET is sourced from the original manufacturer or authorized distributors?
All TPS650001RTET products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS650001RTET meets industry standards.
7.What is the process for return or replacement of TPS650001RTET?
All TPS650001RTET units undergo pre-shipment inspection (PSI). If there is an issue with TPS650001RTET, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS650001RTET part is unused and in its original packaging.
Return procedure for TPS650001RTET:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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