Texas Instruments TPS650003RTER
- Part No.:
- TPS650003RTER
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 16-WFQFN Exposed Pad
- Datasheet:
-
TPS650003RTER.pdf
- Description:
- IC CONV STP-DN 2.25MHZ DL 16WQFN
- Quantity:
- Payment:

- Shipping:

Inventory:42,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TPS650003RTER from Texas Instruments is a highly integrated power management IC (PMIC) for portable electronics, combining a 600-mA step-down converter, two fixed-output LDO regulators (VLDO1 = 1.8 V, VLDO2 = 3.3 V), spread-spectrum clocking, and internal reference circuitry in a single 3-mm × 3-mm WQFN-16 package. It operates from 2.3 V to 6 V input, delivers up to 300 mA per LDO, and supports automatic PFM/PWM mode transition for high efficiency across light-to-heavy loads - ideal for embedded processor core and I/O rail power in smartphones and PDAs.
For engineers reviewing the TPS650003RTER datasheet, TPS650003RTER pinout, TPS650003RTER application, or TPS650003RTER equivalent, key selection criteria include its fixed dual-LDO outputs, 2.25-MHz switching frequency with EMI-reducing SSC, 16-pin WQFN thermal performance (RθJA = 44.7°C/W), and compatibility with standard 2.2-μH inductors and 10-μF output capacitors in compact point-of-load designs.
Technical Context
The TPS650003RTER implements a synchronous buck converter with internal high-side/low-side MOSFETs (RDS(on) = 240 mΩ / 185 mΩ), feedback-controlled via FB_DCDC pin referencing a 0.6-V internal bandgap (±1.5% accuracy in PWM mode). Its MODE pin selects between forced PWM (high) or auto PFM/PWM (low), enabling dynamic efficiency optimization. The device uses a 2.25-MHz oscillator with spread-spectrum modulation to reduce conducted EMI without external components.
Two independent LDOs - VLDO1 (1.8 V, 300 mA) and VLDO2 (3.3 V, 300 mA) - feature separate enable inputs (EN_LDO1/EN_LDO2), dedicated input pins (VINLDO1/VINLDO2), and 370-mV dropout at 250 mA. Power-good monitoring (PG) asserts open-drain low only when all enabled rails are in regulation, supporting safe system sequencing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Step-down output current | 600 mA - sufficient for core voltage of ARM Cortex-A8/A9 processors or FPGA I/O banks |
| Switching frequency | 2.25 MHz (typ) - enables use of small 2.2-μH inductors and 10-μF ceramic output caps |
| LDO1 output | Fixed 1.8 V ±3.5% - matches standard memory interface and logic supply requirements |
| LDO2 output | Fixed 3.3 V ±3.5% - powers USB PHY, SD card controllers, or analog front-end circuits |
| Input voltage range | 2.3 V to 6 V - supports single-cell Li-ion (3.0–4.2 V), Li-polymer, or dual-cell alkaline inputs |
| Quiescent current | 23–32 μA (MODE low, DC-DC enabled, LDOs disabled) - extends battery life in standby mode |
| Thermal resistance | RθJA = 44.7°C/W - allows 370 mW max power dissipation at TA = 25°C on standard 2-layer PCB |
Pinout & Package
TPS650003RTER is housed in a 3.00 mm × 3.00 mm, 16-pin WQFN package (RTE) with exposed thermal pad for enhanced heat dissipation. Pin numbering follows top-view orientation with pin 1 marked by dot or notch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 EN_LDO1 | Digital enable input | Active-high control for 1.8-V LDO; ties to system PMIC sequencer or GPIO |
| 2 EN_LDO2 | Digital enable input | Active-high control for 3.3-V LDO; enables independent power domain gating |
| 3 PG | Open-drain status output | Low when both LDOs and DC-DC are in regulation; requires external pull-up for system reset coordination |
| 4 PGND | Power ground | High-current return path for buck switch and LDO pass FETs; must connect directly to thermal pad |
| 5 SW | Switch node | Connects to external 2.2-μH inductor; carries high di/dt; requires tight layout to minimize EMI |
| 6 VINDCDC | Main input supply | Primary input for buck converter and internal bias; accepts 2.3–6 V; decoupled with ≥10-μF capacitor |
| 7 MODE | Operating mode select | High = forced PWM (constant frequency); low = auto PFM/PWM transition for light-load efficiency |
| 8 EN_DCDC | Digital enable input | Active-high control for buck converter; used for dynamic power cycling during sleep states |
| 9 FB_DCDC | Feedback input | Connects to resistor divider from VDCDC output; sets regulated voltage via 0.6-V internal reference |
| 10 AGND | Analog ground | Reference for FB pins and internal bandgap; must be star-connected near IC and separated from PGND |
| 11 FB_LDO1 | LDO1 feedback input | Connected to resistor divider from VLDO1; configures adjustable output (not used for fixed 1.8 V) |
| 12 VLDO1 | LDO1 output | Fixed 1.8-V supply; delivers up to 300 mA with 370-mV dropout at full load |
| 13 VINLDO1 | LDO1 input | Accepts 1.6–6 V; may be tied to VDCDC or separate battery rail for flexible sequencing |
| 14 FB_LDO2 | LDO2 feedback input | Connected to resistor divider from VLDO2; configures adjustable output (not used for fixed 3.3 V) |
| 15 VLDO2 | LDO2 output | Fixed 3.3-V supply; delivers up to 300 mA with 370-mV dropout at full load |
| 16 VINLDO2 | LDO2 input | Accepts 1.6–6 V; supports independent sourcing from main battery or DC-DC output |
Key Features
| Feature | Design Value |
|---|---|
| Spread-spectrum clocking (SSC) | Reduces peak EMI by modulating 2.25-MHz switching frequency - eliminates need for external EMI filters |
| Auto PFM/PWM mode transition | Maintains >85% efficiency from 100 μA to 600 mA load - critical for battery-powered burst-mode operation |
| Independent LDO enables & inputs | Enables staggered power-up/down sequencing for multi-rail SoCs without external logic |
| Integrated power-good monitor | Single open-drain PG pin reports combined status of DC-DC + both LDOs - simplifies system reset design |
| Low quiescent current (23 μA) | Extends shelf life and standby time in always-on IoT sensors and wearable devices |
Applications
| Smartphone Application | Embedded Processor Board |
|---|---|
|
Use Scenario: Dual-rail power for application processor (core + I/O) in LTE smartphone with Li-ion battery input. IC Role / Device Role / Timing Role: TPS650003RTER supplies 1.8-V core and 3.3-V I/O rails while regulating from 3.6-V battery; PG coordinates boot sequence with AP reset. Use Value: Fixed outputs eliminate external feedback resistors; 2.25-MHz switching enables ultra-compact BOM with 2.2-μH inductor and 10-μF ceramic caps. |
Use Scenario: Point-of-load regulator for ARM-based industrial controller with isolated CAN and Ethernet interfaces. IC Role / Device Role / Timing Role: TPS650003RTER powers processor core (1.8 V) and peripheral interface (3.3 V); MODE pin forced to PWM ensures stable timing for real-time Ethernet MAC. Use Value: Independent VINLDO1/VINLDO2 inputs allow LDOs to be powered from separate backup rails, improving system fault tolerance. |
| Portable Media Player | PDA System Power |
|
Use Scenario: Audio/video subsystem requiring low-noise, tightly regulated supplies for DAC, codec, and display driver. IC Role / Device Role / Timing Role: TPS650003RTER's LDOs deliver clean 1.8-V and 3.3-V rails; SSC reduces switching noise coupling into analog audio paths. Use Value: PSRR >40 dB below 10 kHz suppresses ripple from buck stage, eliminating need for additional LC filtering on LDO outputs. |
Use Scenario: Legacy PDA with MIPS processor, touchscreen controller, and SD card slot operating from dual AA batteries. IC Role / Device Role / Timing Role: TPS650003RTER accepts 2.3–3.2 V input from alkaline cells and generates stable 1.8-V and 3.3-V rails; wide VIN range avoids brownout during battery discharge. Use Value: 1.6-V minimum LDO input enables operation down to 1.8-V battery voltage with headroom for LDO dropout. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS650001RTER | Fixed DC-DC output = 1.2 V; LDO1 = 3.3 V, LDO2 = 1.8 V - swapped LDO voltages and lower DC-DC setpoint | Targets systems needing 1.2-V core + 3.3-V I/O (e.g., older OMAP processors), not 1.8-V core | Select TPS650001RTER only if 1.2-V DC-DC and reversed LDO assignments match your SoC rail map. |
| TPS650006RTER | Fixed DC-DC output = 1.2 V; LDO1 = 3.3 V, LDO2 = 1.8 V - identical to TPS650001 but no SVS block (same as TPS650003) | Matches TPS650003 functionality except DC-DC setpoint; shares same pinout and thermal profile | Choose TPS650006RTER when 1.2-V DC-DC is required instead of 1.5 V, with identical LDO configuration and footprint. |
Compared with TPS650003RTER, TPS650001RTER provides different fixed-voltage combinations optimized for legacy 1.2-V core architectures, while TPS650006RTER offers identical integration and packaging but targets 1.2-V DC-DC applications - both retain the same 16-pin WQFN thermal performance and enable/control logic.
Availability
TPS650003RTER is available at Aetrix Electronics and suitable for smartphone power delivery, embedded processor board design, and portable media player development requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for TPS650003RTER includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog, embedded processing, and connectivity solutions for industrial, automotive, and consumer markets.
The TPS6500x family was designed specifically for space-constrained portable electronics, integrating buck conversion, dual LDOs, and power sequencing in minimal footprint - targeting smartphones, PDAs, and handheld computing devices with stringent efficiency and EMI requirements.
FAQ
What output voltages does the TPS650003RTER provide?
The TPS650003RTER provides three regulated outputs: a programmable step-down converter (typically configured for 1.5 V), plus two fixed-output LDOs - VLDO1 = 1.8 V and VLDO2 = 3.3 V. Both LDOs deliver up to 300 mA each with ±3.5% output voltage accuracy over temperature and load. The DC-DC output is set externally via FB_DCDC and a resistor divider referenced to the 0.6-V internal bandgap.
Does the TPS650003RTER include a supply voltage supervisor (SVS)?
No, the TPS650003RTER does not include a supply voltage supervisor. The SVS function - including RST, MR, TRST, and RSTSNS pins - is exclusive to the TPS65001 and TPS650061 variants. The TPS650003RTER belongs to the TPS65000 spin family and shares the 16-pin WQFN package and core power functions but omits the supervisor block.
What is the recommended inductor value for the TPS650003RTER step-down converter?
The recommended inductor value for the TPS650003RTER step-down converter is 2.2 μH, with typical range 1.5 μH to 3.3 μH. This value balances size, efficiency, and transient response at the nominal 2.25-MHz switching frequency. TI specifies 2.2 μH in all typical application schematics and characterizes electrical performance (e.g., efficiency, ripple) using this value with 10-μF output capacitance.
How does the MODE pin affect TPS650003RTER operation?
The MODE pin on the TPS650003RTER selects between two operating modes: when pulled high, it forces continuous PWM operation for constant-frequency, low-noise performance; when pulled low, it enables automatic PFM/PWM transition to maximize light-load efficiency. In PFM mode, quiescent current drops to 23–32 μA, making it ideal for battery standby, while PWM mode ensures predictable EMI behavior during active processing.
Can the TPS650003RTER LDOs be powered from sources other than the DC-DC output?
Yes, the TPS650003RTER LDOs support independent input sourcing: VINLDO1 and VINLDO2 accept 1.6 V to 6 V and may be connected to the DC-DC output, a separate battery rail, or a secondary power source. This enables flexible power sequencing - for example, powering VLDO2 (3.3 V) from a main battery while deriving VLDO1 (1.8 V) from the regulated DC-DC output - without requiring external diodes or switches.
TPS650003RTER Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-WFQFN Exposed Pad
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Applications:
- Handheld/Mobile Devices
- Current - Supply:
- -
- Voltage - Supply:
- 2.3V ~ 6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-WQFN (3x3)
TPS650003RTER FAQ
1.How can I place an order for TPS650003RTER through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS650003RTER on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS650003RTER reliable?
The price and inventory of TPS650003RTER are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS650003RTER is usually 5 days.
3.What payment methods are accepted for TPS650003RTER?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS650003RTER transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS650003RTER?
TPS650003RTER orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS650003RTER order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS650003RTER?
For technical support, including TPS650003RTER datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS650003RTER requirements.
6.How does Aetrix verify that TPS650003RTER is sourced from the original manufacturer or authorized distributors?
All TPS650003RTER products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS650003RTER meets industry standards.
7.What is the process for return or replacement of TPS650003RTER?
All TPS650003RTER units undergo pre-shipment inspection (PSI). If there is an issue with TPS650003RTER, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS650003RTER part is unused and in its original packaging.
Return procedure for TPS650003RTER:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPS650003RTER Tags

-
TPS2511DGNR
Texas Instruments

-
UTC2000/MG
Microchip Technology

-
TUSB320HAIRWBR
Texas Instruments

-
TPS61252DSGR
Texas Instruments

-
PI5USB30216CXUAEX
Diodes Incorporated
-
SN6501DBVR
Texas Instruments

-
CYPD3177-24LQXQT
Infineon Technologies
-
SN6501QDBVRQ1
Texas Instruments

-
STUSB1600AQTR
STMicroelectronics

-
SN6505BDBVR
Texas Instruments
-
SN6501DBVT
Texas Instruments

-
TPS65150PWPR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
