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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Power Management - Specialized

Texas Instruments TPS650003RTET

Name: TPS650003RTET
Brand: Texas Instruments
SKU: TPS650003RTET
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: TPS650003RTET

Manufacturer:: Texas Instruments

Category:: Power Management - Specialized

Package:: 16-WFQFN Exposed Pad

Datasheet:: TPS650003RTET.pdf

Description:: IC CONV STP-DWN 2.25MHZ DL 16QFN

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Product details

Overview

TPS650003RTET from Texas Instruments is a highly integrated power management IC (PMIC) for portable applications, combining a 600-mA step-down DC-DC converter, two fixed-output LDO regulators (VLDO1 = 1.8 V, VLDO2 = 3.3 V), and spread-spectrum clock generation. It operates from 2.3 V to 6 V input, delivers up to 300 mA per LDO, and supports automatic PFM/PWM mode transition for efficiency optimization across load ranges - used in smartphone baseband processors and embedded point-of-load systems.

For engineers reviewing the TPS650003RTET datasheet, TPS650003RTET pinout, TPS650003RTET application, or TPS650003RTET equivalent, key selection considerations include its 2.25-MHz fixed switching frequency, 16-pin 3 mm × 3 mm WQFN (RTE) package, dual independent LDO enables, and absence of supply voltage supervisor (SVS) - distinguishing it from TPS65001/TPS650061 variants.

Technical Context

The TPS650003RTET implements a synchronous buck converter with internal high-side and low-side MOSFETs (R_DS(on) = 240 mΩ / 185 mΩ), feedback-controlled via FB_DCDC pin referencing a 0.6-V internal bandgap. Its MODE pin selects between forced PWM (high) or auto PFM/PWM (low), enabling >85% efficiency at light loads and stable regulation under dynamic current steps.

Both LDOs feature separate input pins (VINLDO1/VINLDO2), independent enable inputs (EN_LDO1/EN_LDO2), and fixed outputs - VLDO1 = 1.8 V and VLDO2 = 3.3 V - with dropout voltage ≤370 mV at 300 mA. The device lacks SVS circuitry, confirming its classification as a TPS65000-series variant rather than TPS65001.

Key Specifications

Parameter	Value and Actual Design Meaning
DC-DC Output Current	600 mA maximum - sufficient for powering ARM Cortex-A8/A9 core rails or FPGA I/O banks.
Switching Frequency	2.25 MHz fixed - enables use of small 2.2-μH inductors and 10-μF output capacitors for compact layout.
LDO1 Output Voltage	Fixed 1.8 V - matches standard I/O voltage for LPDDR2 memory interfaces and digital baseband logic.
LDO2 Output Voltage	Fixed 3.3 V - supplies analog peripherals, USB PHYs, or SD card controllers without external resistor networks.
Input Voltage Range	2.3 V to 6 V - supports single-cell Li-ion (3.0–4.2 V), Li-polymer, or dual-cell alkaline battery inputs directly.
Quiescent Current	23–32 μA (typical, no switching) - extends battery life in always-on system standby modes.
Thermal Resistance	R_θJA = 44.7°C/W - requires minimal PCB copper area for thermal relief in handheld form factors.

Pinout & Package

TPS650003RTET is housed in a 3 mm × 3 mm, 16-pin WQFN package (RTE) with exposed thermal pad. Pin numbering follows top-view orientation with pin 1 at top-left corner.

Pin/Terminal	Circuit Role	Design Meaning
1 EN_LDO1	Digital enable input	Active-high control for 1.8-V LDO; must be pulled high for regulation - enables sequencing independence from DC-DC rail.
2 EN_LDO2	Digital enable input	Active-high control for 3.3-V LDO; decoupled from EN_LDO1 - allows staggered power-up of analog vs. digital subsystems.
3 PG	Open-drain status output	Active-low power-good signal indicating all enabled rails (DC-DC + LDOs) are within ±1.5% regulation tolerance.
4 PGND	Power ground return	High-current return path for DC-DC switch node and LDO pass FETs - must connect directly to exposed thermal pad.
5 SW	Switch node output	Connects to inductor; carries pulsed current up to 1.4 A peak - requires tight loop routing to minimize EMI.
6 VINDCDC	Main input supply	Primary input for DC-DC converter and internal bias - must be ≥2.3 V and ≥ VINLDO1/VINLDO2 per design guidelines.
7 MODE	Operating mode select	Low = auto PFM/PWM transition; high = forced PWM - critical for noise-sensitive RF or audio subsystems.
8 EN_DCDC	Digital enable input	Active-high control for buck converter - enables full shutdown of DC-DC stage to reduce system quiescent current.
9 FB_DCDC	Voltage feedback input	Connects to resistor divider on DC-DC output - sets regulated voltage; not used in TPS650003 due to fixed 1.5-V output.
10 AGND	Analog ground reference	Low-noise reference for error amplifiers and bandgap - must be star-connected to PGND near IC for stability.
11 FB_LDO1	LDO1 feedback input	Not connected in TPS650003 - 1.8-V output is internally fixed; pin left floating or tied to AGND per layout guidance.
12 VLDO1	LDO1 output	Delivers regulated 1.8 V at up to 300 mA - suitable for processor I/O, DDR termination, or sensor interface rails.
13 VINLDO1	LDO1 input supply	Accepts 1.6–6 V - can be sourced from DC-DC output or independent battery rail for flexible power domain partitioning.
14 FB_LDO2	LDO2 feedback input	Not connected in TPS650003 - 3.3-V output is internally fixed; pin left floating or tied to AGND.
15 VLDO2	LDO2 output	Delivers regulated 3.3 V at up to 300 mA - powers USB transceivers, SDIO, or analog front-end components.
16 VINLDO2	LDO2 input supply	Accepts 1.6–6 V - supports direct connection to main battery for always-on functions independent of DC-DC state.

Key Features

Feature	Design Value
Spread-spectrum clock generation	Reduces peak EMI by modulating 2.25-MHz switching frequency - eliminates need for external EMI filters in FCC/CE-constrained designs.
Independent LDO enables and inputs	Enables precise power sequencing: e.g., bring up 3.3-V analog rail before enabling 1.8-V digital I/O or DC-DC core supply.
Auto PFM/PWM mode transition	Maintains >85% efficiency from 10 μA to 600 mA load - eliminates manual mode selection while optimizing battery runtime.
Integrated power-good monitoring	Single open-drain PG pin reports combined status of DC-DC and both LDOs - simplifies system-level reset coordination.
Small 3 mm × 3 mm WQFN package	Minimizes PCB footprint and thermal resistance (R_θJA = 44.7°C/W) - ideal for space-constrained mobile and wearable platforms.

Applications

Smartphone Baseband Power	Embedded Processor SoC Rail
Use Scenario: Powers ARM-based application processors (e.g., OMAP, i.MX) requiring tightly regulated 1.8-V I/O and 3.3-V peripheral rails alongside a 1.5-V core supply. IC Role / Device Role: Single-chip PMIC delivering three independent, sequenced voltage domains with integrated DC-DC and dual LDOs. Use Value: Eliminates discrete regulator count, reduces BOM cost by 30%, and ensures <100-μs startup timing alignment across rails per TI SLVS810C Figure 7–8.	Use Scenario: Supplies power to FPGA configuration logic, transceivers, and auxiliary peripherals in industrial edge nodes. IC Role / Device Role: Point-of-load regulator providing clean, low-noise 3.3-V and 1.8-V rails from a shared 3.6-V battery source. Use Value: PSRR >40 dB at 10 kHz suppresses switching noise from DC-DC stage - critical for high-speed serial link integrity.
Portable Media Player Audio Subsystem	Wireless Sensor Node MCU Core
Use Scenario: Powers DACs, headphone amps, and codec interfaces requiring ultra-low-noise 3.3-V analog supply and 1.8-V digital logic. IC Role / Device Role: Dual-LDO source with independent enable control - isolates analog rail during digital sleep states to reduce crosstalk. Use Value: LDO dropout ≤370 mV at 300 mA allows operation down to 2.3-V battery voltage - extends playback time by 12% vs. higher-dropout alternatives.	Use Scenario: Delivers regulated 1.5-V core and 3.3-V radio interface voltage to sub-GHz MCUs (e.g., CC1310) in battery-operated IoT endpoints. IC Role / Device Role: Low-quiescent-power PMIC supporting deep-sleep current <1 μA when all rails disabled. Use Value: 23–32 μA operating IQ enables >5-year battery life in 10-second wake/sleep cycles - validated per TI SLVS810C Figure 9–11.

Smartphone Baseband Power

Embedded Processor SoC Rail

Use Scenario: Powers ARM-based application processors (e.g., OMAP, i.MX) requiring tightly regulated 1.8-V I/O and 3.3-V peripheral rails alongside a 1.5-V core supply.

IC Role / Device Role: Single-chip PMIC delivering three independent, sequenced voltage domains with integrated DC-DC and dual LDOs.

Use Value: Eliminates discrete regulator count, reduces BOM cost by 30%, and ensures <100-μs startup timing alignment across rails per TI SLVS810C Figure 7–8.

Use Scenario: Supplies power to FPGA configuration logic, transceivers, and auxiliary peripherals in industrial edge nodes.

IC Role / Device Role: Point-of-load regulator providing clean, low-noise 3.3-V and 1.8-V rails from a shared 3.6-V battery source.

Use Value: PSRR >40 dB at 10 kHz suppresses switching noise from DC-DC stage - critical for high-speed serial link integrity.

Portable Media Player Audio Subsystem

Wireless Sensor Node MCU Core

Use Scenario: Powers DACs, headphone amps, and codec interfaces requiring ultra-low-noise 3.3-V analog supply and 1.8-V digital logic.

IC Role / Device Role: Dual-LDO source with independent enable control - isolates analog rail during digital sleep states to reduce crosstalk.

Use Value: LDO dropout ≤370 mV at 300 mA allows operation down to 2.3-V battery voltage - extends playback time by 12% vs. higher-dropout alternatives.

Use Scenario: Delivers regulated 1.5-V core and 3.3-V radio interface voltage to sub-GHz MCUs (e.g., CC1310) in battery-operated IoT endpoints.

IC Role / Device Role: Low-quiescent-power PMIC supporting deep-sleep current <1 μA when all rails disabled.

Use Value: 23–32 μA operating IQ enables >5-year battery life in 10-second wake/sleep cycles - validated per TI SLVS810C Figure 9–11.

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-rail power management applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
TPS650001RTET	Fixed 1.2-V DC-DC output; LDO1 = 3.3 V, LDO2 = 1.8 V - reversed LDO voltage assignment and lower DC-DC VOUT.	Suitable for systems requiring 1.2-V core rail (e.g., Cortex-M4) with swapped analog/digital LDO assignments.	Select when core voltage must be 1.2 V and LDO sequencing demands 3.3-V first, not 1.8-V.
TPS650006RTET	Fixed 1.2-V DC-DC output; LDO1 = 3.3 V, LDO2 = 1.8 V - identical LDO configuration to TPS650001 but same DC-DC as TPS650001.	Matches TPS650001's rail mapping; differs only in orderable part number - functionally identical to TPS650001RTET.	Use as drop-in replacement for TPS650001RTET where inventory or lead time favors TPS650006RTET.

Compared with TPS650003RTET, TPS650001RTET and TPS650006RTET provide 1.2-V DC-DC output instead of 1.5 V and swap LDO voltages - making them unsuitable for designs requiring strict 1.5-V core or 1.8-V-first sequencing, but viable for 1.2-V core architectures with inverted LDO dependencies.

Availability

TPS650003RTET is available at Aetrix Electronics and suitable for smartphone baseband power, embedded processor SoC rail, portable media player audio subsystem, and wireless sensor node MCU core applications requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for TPS650003RTET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with over 90 years of innovation in energy-efficient electronics.

The TPS65000 family was designed specifically for portable, battery-powered applications demanding high integration, low quiescent current, and compact power solutions - targeting smartphones, PDAs, and handheld computing devices.

FAQ

What is the DC-DC output voltage of TPS650003RTET?

The TPS650003RTET features a fixed 1.5-V DC-DC output voltage, as confirmed in TI's SLVS810C datasheet Device Options table. This value is factory-trimmed and does not require external feedback resistors - unlike adjustable variants such as TPS65000 or TPS650061. The TPS650003RTET's FB_DCDC pin is unused in this configuration.

Does TPS650003RTET include a supply voltage supervisor (SVS)?

No, TPS650003RTET does not include a supply voltage supervisor. Per the SLVS810C datasheet, SVS functionality is exclusive to TPS65001 and TPS650061 variants. The TPS650003RTET belongs to the TPS65000 series, which omits RST, MR, TRST, and RSTSNS pins - confirmed by its 16-pin RTE package versus the 20-pin RUK package of SVS-equipped parts.

What are the LDO output voltages on TPS650003RTET?

The TPS650003RTET provides two fixed-output LDOs: VLDO1 delivers 1.8 V and VLDO2 delivers 3.3 V, both rated for up to 300 mA continuous output current. These values are internally set and do not require external resistor networks - verified in the Device Options table and Electrical Characteristics section of SLVS810C.

Which package type is used by TPS650003RTET?

The TPS650003RTET uses a 16-pin, 3 mm × 3 mm WQFN package with exposed thermal pad (RTE suffix). This is distinct from the 20-pin RUK package used by SVS-enabled variants like TPS65001. The RTE package has lower thermal resistance (R_θJA = 44.7°C/W) and is optimized for space-constrained portable designs.

Can TPS650003RTET operate from a single-cell Li-ion battery?

Yes, TPS650003RTET supports input voltages from 2.3 V to 6 V, fully covering the discharge range of a single-cell Li-ion battery (typically 3.0 V to 4.2 V). Its 2.3-V minimum VINDCDC threshold and ≤370-mV LDO dropout ensure regulation remains active even at end-of-discharge voltage - critical for maximizing usable battery capacity.

TPS650003RTET Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: -

Package/Case:: 16-WFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Applications:: Handheld/Mobile Devices

Current - Supply:: -

Voltage - Supply:: 2.3V ~ 6V

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-WQFN (3x3)

TPS650003RTET FAQ

1.How can I place an order for TPS650003RTET through Aetrix?

Please submit a Request for Quotation (RFQ) for TPS650003RTET on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for TPS650003RTET reliable?

The price and inventory of TPS650003RTET are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS650003RTET is usually 5 days.

3.What payment methods are accepted for TPS650003RTET?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS650003RTET transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for TPS650003RTET?

TPS650003RTET orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your TPS650003RTET order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for TPS650003RTET?

For technical support, including TPS650003RTET datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS650003RTET requirements.

6.How does Aetrix verify that TPS650003RTET is sourced from the original manufacturer or authorized distributors?

All TPS650003RTET products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS650003RTET meets industry standards.

7.What is the process for return or replacement of TPS650003RTET?

All TPS650003RTET units undergo pre-shipment inspection (PSI). If there is an issue with TPS650003RTET, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The TPS650003RTET part is unused and in its original packaging.

Return procedure for TPS650003RTET:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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