Texas Instruments TPS65051RSMT

Overview

TPS65051RSMT from Texas Instruments is a 6-channel power-management IC integrating two step-down DC-DC converters (DCDC1: 1 A, DCDC2: 600 mA) and four low-input-voltage LDOs (two 400-mA, two 200-mA) for single-cell Li-Ion/Li-Polymer systems. It supports digital voltage selection for both DC-DC outputs and all four LDOs, operates from 2.5 V to 6 V input, and delivers ±1% output accuracy in PWM mode - used in OMAP™/TMS320™ DSP and Samsung S3C24xx application processor power supplies.

For engineers reviewing the TPS65051RSMT datasheet, TPS65051RSMT pinout, TPS65051RSMT application, or TPS65051RSMT equivalent, key selection criteria include its dual-buck + quad-LDO architecture, 2.25-MHz fixed-frequency operation with PFM/PWM mode switching via MODE pin, 32-μA quiescent current in light-load PFM mode, and support for external resistor-based output voltage programming on both DC-DC channels.

Technical Context

The TPS65051RSMT implements two synchronous buck converters with integrated high-side and low-side MOSFETs (r_DS(on) ≤630 mΩ P-ch / ≤450 mΩ N-ch), 180° out-of-phase switching to reduce input ripple, and 100% duty-cycle capability for ultra-low dropout. Its four LDOs feature high PSRR (70 dB at 10 kHz), independent enable control, and digital default-voltage selection via DEFLDO1–DEFLDO4 pins.

It includes dedicated reset generation with 100-ms delay (t_{RESET_DELAY}), push-button ON/OFF interface (PB_IN/PB_OUT with 32-ms debounce), and thermal shutdown at 150°C with 20°C hysteresis. All rails support independent sequencing via individual EN pins, enabling precise power-up/down control in processor-based systems.

Key Specifications

Pinout & Package

TPS65051RSMT is housed in a 32-pin VQFN package (4.0 mm × 4.0 mm) with exposed thermal pad connected to GND. Pin functions are fully defined per TI SLVS710C Rev C datasheet.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar multi-rail power management applications.

Compared with TPS65054RSMT and TPS65056RSMT, the TPS65051RSMT uniquely supports 1-A DCDC1 current and externally adjustable DCDC1 output (0.6 V to V_IN), making it the only variant in the family suitable for high-performance application processors requiring scalable core voltage.

Availability

TPS65051RSMT is available at Aetrix Electronics and suitable for smartphone baseband power, OMAP application processor supply, Samsung S3C24xx system power, and portable media player power requiring stable component supply across production lifecycles.

Supply support for TPS65051RSMT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and power management technologies, with decades of leadership in PMIC design for mobile and portable electronics.

The TPS6505x product line was engineered specifically for single-cell Li-Ion/Li-Polymer powered systems requiring tightly regulated, sequenced, and space-constrained multi-rail power - targeting smartphones, PDAs, and application processor platforms.

FAQ

What is the maximum output current supported by DCDC1 in the TPS65051RSMT?

The TPS65051RSMT supports up to 1 A output current on its DCDC1 converter, as confirmed in the Device Options table and Electrical Characteristics section of the SLVS710C datasheet. This distinguishes it from TPS65050/TPS65054 variants rated at 600 mA. The 1-A capability enables direct powering of high-performance application processor cores such as OMAP3 or S3C2440 in full-speed operation. TPS65051RSMT maintains this rating across the full 2.5–6 V input range with proper thermal management.

Does the TPS65051RSMT support external adjustment of both DC-DC converter outputs?

Yes, the TPS65051RSMT supports external resistor-based adjustment of DCDC1 output voltage (0.6 V to V_IN) via FB_DCDC1 pin, and DCDC2 output voltage is digitally selectable between 1.0 V and 1.3 V using the DEFDCDC2 pin. Unlike TPS65052/TPS65056 which fix DCDC1 at 3.3 V, the TPS65051RSMT retains full external adjustability for DCDC1 - a key differentiator for systems requiring variable core voltage scaling. This functionality is explicitly documented in the Pin Functions and Features sections of the datasheet.

How does the MODE pin affect efficiency and noise performance in the TPS65051RSMT?

The MODE pin on the TPS65051RSMT selects between Power Save Mode (PFM at light loads, PWM at heavy loads) when pulled low, and forced PWM Mode when pulled high. In PFM mode, quiescent current drops to 32–40 μA with both converters active, maximizing battery life in idle states. In forced PWM mode, switching remains constant at 2.25 MHz, reducing output voltage ripple and EMI - critical for noise-sensitive analog circuits. The choice directly impacts system-level trade-offs between efficiency and spectral purity.

Can the TPS65051RSMT generate a system reset signal, and what is its timing behavior?

Yes, the TPS65051RSMT provides an open-drain RESET output with a guaranteed 80–120 ms delay after VCC rises above the undervoltage lockout threshold (1.8–2.0 V). This reset pulse is generated internally and does not require external components. The RESET signal remains asserted low during brownout or thermal shutdown events, ensuring reliable processor initialization. Unlike TPS65050, the TPS65051RSMT uses THRESHOLD and HYSTERESIS pins for precision reset threshold setting, supporting custom voltage monitoring.

What are the thermal characteristics and package requirements for the TPS65051RSMT?

The TPS65051RSMT uses a 32-pin VQFN (RSM) package with 4.0 mm × 4.0 mm body and exposed thermal pad. Its junction-to-board thermal resistance (R_θJB) is 8°C/W, and junction-to-ambient (R_θJA) is 37.3°C/W with standard PCB layout. TI specifies a maximum power dissipation of 0.95 W at 70°C ambient. Successful thermal design requires soldering the thermal pad to a minimum 100 mm² copper area with ≥4 thermal vias to inner ground planes - essential for sustaining 1-A DCDC1 operation under continuous load.