Texas Instruments TPS65055RSMR
- Part No.:
- TPS65055RSMR
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
TPS65055RSMR.pdf
- Description:
- IC DUAL STP-DN CONV W/LDO 32VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,564
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Product details
Overview
TPS65055RSMR from Texas Instruments is a highly integrated power management IC (PMIC) for single-cell Li-ion/Li-polymer systems, featuring two 600 mA synchronous step-down converters (DCDC1/DCDC2) and four low-noise LDOs (two 400 mA, two 200 mA), all in a 4 mm × 4 mm 32-pin VQFN package. It delivers core and I/O rail voltages for OMAP™, XScale™, and low-power DSP applications with up to 95% efficiency and 2.25 MHz fixed-frequency operation.
For engineers reviewing the TPS65055RSMR datasheet, TPS65055RSMR pinout, TPS65055RSMR application, or TPS65055RSMR equivalent, key selection considerations include its dual-phase 2.25 MHz DC-DC architecture, I²C programmability, digital LDO voltage selection via DEFLDO1/DEFLDO2 pins, and support for both PWM and PFM modes across load ranges.
Technical Context
The TPS65055RSMR implements two independent synchronous buck converters with 180° out-of-phase switching to reduce input RMS current and enable smaller input capacitors. Each converter uses voltage-mode control with input-voltage feedforward for fast line/load regulation and supports 100% duty cycle for ultra-low dropout operation.
Its four LDOs are digitally configurable via two binary inputs (DEFLDO1/DEFLDO2), enabling nine distinct output voltage combinations across VLDO1–VLDO4. The device integrates an I²C-compatible interface for dynamic voltage scaling and real-time register access, alongside dedicated enable pins (EN_DCDC1/EN_DCDC2/EN_LDOx) and open-drain status outputs (RST, DPD, discharge).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DC-DC Output Current | 2 × 600 mA - supports simultaneous core + I/O rail delivery in compact portable systems |
| Switching Frequency | 2.25 MHz (±10%) - enables use of small 1.5–2.2 μH inductors and 10–22 μF ceramic output capacitors |
| LDO Output Current | VLDO1/VLDO2: 400 mA; VLDO3/VLDO4: 200 mA - sufficient for RF, audio, and sensor bias rails |
| Output Voltage Accuracy | ±1% in PWM mode - ensures stable processor core voltage under dynamic load conditions |
| Quiescent Current | 32 μA typical (both DC-DCs active, no LDOs enabled) - extends battery life in always-on subsystems |
| Input Voltage Range | VINDCDC1/2: 2.5–6 V; VINLDOx: 1.5–6.5 V - compatible with single Li-ion cell (2.7–4.2 V) and direct battery tap |
| Thermal Shutdown | 150°C junction temperature with 20°C hysteresis - protects against sustained overload or poor PCB thermal design |
Pinout & Package
TPS65055RSMR is housed in a 4.00 mm × 4.00 mm, 32-pin VQFN (RSM) package with 0.4 mm pitch and exposed PowerPAD™ thermally connected to AGND. Pin functions are validated per TI SLVS844A Rev. JUNE 2015 datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| EN_DCDC1 (25) | Enable input | Active-high control for DCDC1; must be pulled high to activate converter 1 |
| VDCDC1 (24) | Feedback sense | Direct connection to DCDC1 output required; no external resistor divider allowed |
| L1 (22) | Power switch node | Connects to inductor; carries high-frequency switching current for DCDC1 |
| PGND1 (23) | Power ground | Dedicated ground return path for DCDC1 power stage; separate from AGND |
| DEFLDO1 (9) / DEFLDO2 (6) | Digital configuration input | Two-bit binary select for LDO output voltages (nine combinations for VLDO1–VLDO4) |
| SCLK (32) / SDAT (31) | I²C interface | Standard I²C clock/data lines supporting dynamic voltage programming and status readback |
| RST (8) / DPD (13) | Open-drain status output | Active-low signals indicating UVLO condition; require external pull-up resistors |
Key Features
| Feature | Design Value |
|---|---|
| 180° out-of-phase DC-DC operation | Reduces input ripple current by ~30%, allowing smaller 22 μF input capacitor instead of ≥47 μF |
| I²C-compatible interface | Enables real-time adjustment of DCDC2 output voltage and LDO settings without hardware changes |
| PFM/PWM auto-transition | Maintains >85% efficiency down to 100 μA load while limiting output ripple in light-load PFM mode |
| High PSRR LDOs | 70 dB rejection at 10 kHz - suppresses switching noise from DC-DC stages feeding sensitive analog circuits |
| Dual enable control per LDO | Independent EN_LDO1–EN_LDO4 pins allow sequenced power-up and selective rail shutdown for power optimization |
Applications
| Smartphone Baseband Power | OMAP™ Application Processor Supply |
|---|---|
Use Scenario: Powers ARM Cortex-A8 core, memory I/O, and peripheral interfaces in single-battery smartphones. IC Role / Device Role / Timing Role: Provides tightly regulated 1.2 V core (DCDC2) and 2.1 V I/O (DCDC1) rails with synchronized switching to minimize EMI. Use Value: Dual-phase 2.25 MHz operation reduces input capacitance requirements by 40% versus 1 MHz alternatives, saving board space. |
Use Scenario: Supplies multiple voltage domains (core, L3, USB PHY, camera ISP) in OMAP3/4 platforms. IC Role / Device Role / Timing Role: Delivers 1.0 V/1.2 V core and 1.8 V/2.8 V I/O via programmable LDOs with I²C-controlled sequencing. Use Value: Nine LDO voltage combinations eliminate need for external resistor networks, reducing BOM count and layout complexity. |
| Portable Media Player Audio Bias | Low-Power DSP Sensor Hub |
Use Scenario: Generates clean 3.3 V and 1.8 V rails for DACs, headphone amplifiers, and codec interfaces. IC Role / Device Role / Timing Role: Uses VLDO1/VLDO2 (400 mA) and VLDO3/VLDO4 (200 mA) with 70 dB PSRR to isolate analog audio paths from digital switching noise. Use Value: Low 25 mVPP ripple in PFM mode prevents audible switching artifacts during playback. |
Use Scenario: Powers XScale-based sensor fusion modules with motion, ambient light, and proximity sensors. IC Role / Device Role / Timing Role: Supplies 1.2 V core (DCDC2), 2.85 V sensor bias (VLDO2), and 1.1 V/1.3 V logic (VLDO3/VLDO4) with independent enable control. Use Value: 32 μA quiescent current extends battery runtime in always-on sensor monitoring mode. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power management IC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65053RSMR | Omits I²C interface; fixed LDO voltages set only by DEFLDO1/DEFLDO2 pins | Suitable for cost-sensitive designs where dynamic voltage scaling is unnecessary | Choose when firmware control of DCDC2/LDO outputs is not required and BOM cost reduction is prioritized |
| TPS65056RSMR | Includes integrated battery charger and fuel gauge interface; adds VBAT monitoring pin | Required for systems needing Li-ion charging management alongside PMIC functionality | Choose when battery charging, state-of-charge reporting, or VBAT supervision is mandatory |
Compared with TPS65055RSMR, TPS65053RSMR removes I²C programmability but retains identical DC-DC/LDO specs and pinout, while TPS65056RSMR adds battery management features at the expense of increased complexity and higher cost-making TPS65055RSMR optimal for pure multi-rail power delivery without charging.
Availability
TPS65055RSMR is available at Aetrix Electronics and suitable for smartphone baseband power, OMAP™ processor supply, portable media player audio bias, and low-power DSP sensor hub applications requiring stable component supply and long-term industrial availability.
Supply support for TPS65055RSMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with over 50 years of innovation in energy-efficient IC design.
The TPS65055RSMR belongs to TI's integrated power management IC product line, engineered specifically for space-constrained, battery-powered portable devices requiring high-efficiency multi-rail power delivery with minimal external components.
FAQ
What is the maximum supported input voltage for the TPS65055RSMR DC-DC converters?
The TPS65055RSMR DC-DC converters (DCDC1 and DCDC2) accept an input voltage range of 2.5 V to 6 V on the VINDCDC1/2 pin. This allows direct connection to a single Li-ion/Li-polymer cell (2.7–4.2 V nominal) or a regulated intermediate rail. Exceeding 6 V risks permanent damage per absolute maximum ratings.
Can the TPS65055RSMR operate without external inductors or capacitors?
No, the TPS65055RSMR requires external inductors (1.5–2.2 μH) on L1 and L2 pins and ceramic capacitors (10–22 μF output, 22 μF input) for stable operation. Its internal synchronous MOSFETs and control circuitry depend on these external components to form functional buck converters and maintain regulation.
How does the TPS65055RSMR handle thermal overload conditions?
The TPS65055RSMR incorporates thermal shutdown protection that activates at 150°C junction temperature, disabling all regulators until the die cools by 20°C hysteresis. This prevents catastrophic failure during sustained overload or inadequate PCB heat sinking, and recovery is automatic once temperature falls below 130°C.
Is the TPS65055RSMR pin-compatible with other devices in the TPS6505x family?
Yes, the TPS65055RSMR shares the same 32-pin VQFN (RSM) package and pinout with TPS65053RSMR and TPS65056RSMR. However, functional differences exist: TPS65053 lacks I²C, and TPS65056 adds battery charging-so firmware and external circuitry must be verified for compatibility before substitution.
What is the purpose of the discharge pin on the TPS65055RSMR?
The discharge pin (pin 14) on the TPS65055RSMR is an open-drain output driven by an internal comparator monitoring the threshold pin. When the threshold voltage drops below 0.78 V, the discharge pin actively pulls low to rapidly discharge external capacitors-enabling controlled power-down sequences and preventing residual voltage hold-up in safety-critical systems.
TPS65055RSMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Handheld/Mobile Devices
- Current - Supply:
- -
- Voltage - Supply:
- 2.5V ~ 6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-VQFN (4x4)
TPS65055RSMR FAQ
1.How can I place an order for TPS65055RSMR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65055RSMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65055RSMR reliable?
The price and inventory of TPS65055RSMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65055RSMR is usually 5 days.
3.What payment methods are accepted for TPS65055RSMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65055RSMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS65055RSMR?
TPS65055RSMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65055RSMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65055RSMR?
For technical support, including TPS65055RSMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65055RSMR requirements.
6.How does Aetrix verify that TPS65055RSMR is sourced from the original manufacturer or authorized distributors?
All TPS65055RSMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65055RSMR meets industry standards.
7.What is the process for return or replacement of TPS65055RSMR?
All TPS65055RSMR units undergo pre-shipment inspection (PSI). If there is an issue with TPS65055RSMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65055RSMR part is unused and in its original packaging.
Return procedure for TPS65055RSMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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