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Texas Instruments TPS65056RSMR
- Part No.:
- TPS65056RSMR
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
TPS65056RSMR.pdf
- Description:
- IC PWR MGMT 6CH W/4 LDO 32VQFN
- Quantity:
- Payment:
- Shipping:
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Product details
Overview
TPS65056RSMR from Texas Instruments is a 6-channel power-management IC integrating two step-down DC-DC converters (DCDC1: 1 A, DCDC2: 600 mA) and four low-input-voltage LDOs (two 400-mA and two 200-mA) for single-cell Li-Ion/Li-Polymer systems. It features fixed 3.3-V DCDC1 output, selectable 1.0-V/1.3-V DCDC2 via DEFDCDC2 pin, digital LDO voltage selection, and 2.25-MHz switching frequency with PFM/PWM mode control. Used in OMAP™ and Samsung S3C24xx application processor power supplies.
For engineers reviewing the TPS65056RSMR datasheet, TPS65056RSMR pinout, TPS65056RSMR application, or TPS65056RSMR equivalent, key selection criteria include confirmed 1-A DCDC1 current capability, dual-mode (PFM/PWM) operation, digital LDO voltage configuration, thermal performance (RθJA = 37.3°C/W), and VQFN-32 package compatibility with exposed thermal pad.
Technical Context
The TPS65056RSMR implements two synchronous buck converters operating at 2.25 MHz with 180° out-of-phase switching to reduce input ripple. DCDC1 delivers fixed 3.3 V at up to 1 A; DCDC2 provides digitally selectable 1.0 V or 1.3 V at 600 mA using the DEFDCDC2 pin as a logic-level selector. Both converters support 100% duty cycle for ultra-low dropout and enter power-save mode below ~32 mA load.
Four integrated LDOs accept 1.5–6.5 V input: LDO1/LDO2 supply 400 mA each with high PSRR (70 dB @ 10 kHz); LDO3/LDO4 deliver 200 mA each. Digital voltage selection for all LDOs is implemented via DEFLDO1–DEFLDO4 pins (2-bit encoding), and each LDO includes internal discharge resistors (350 Ω) and fast regulation time (10 μs).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DCDC1 Output Current | 1 A - supports I/O rail of high-performance processors without external boost or parallel stages |
| DCDC2 Output Voltage | 1.0 V or 1.3 V (selectable via DEFDCDC2) - matches core voltage requirements of ARM Cortex-A8/A9 SoCs |
| LDO1/LDO2 Max Current | 400 mA - sufficient for DDR I/O, USB PHY, or camera interface power with <280 mV dropout |
| LDO3/LDO4 Max Current | 200 mA - suitable for low-power peripherals like audio codecs or sensors with <280 mV dropout |
| Switching Frequency | 2.25 MHz (±10%) - enables use of small 1.5–2.2 μH inductors and 10–22 μF ceramic output capacitors |
| Quiescent Current | 32–40 μA (both DC-DCs active, no LDOs) - extends battery life in always-on system standby modes |
| Thermal Resistance | RθJA = 37.3°C/W - requires minimal PCB copper area for thermal management in compact handheld layouts |
Pinout & Package
TPS65056RSMR uses a 32-pin VQFN package (4.0 mm × 4.0 mm) with exposed thermal pad (connected to GND). The package supports high-density portable designs and requires controlled-impedance layout for PGND1/PGND2 separation and thermal pad soldering.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VINDCDC1/2 | Main input supply for both DC-DC converters | Accepts 2.5–6 V; must be tied to same source as VCC; powers internal logic and switching stages |
| DCDC1 Output (VDCDC1) | Fixed 3.3-V I/O rail | Delivers up to 1 A; used for processor I/O, memory interfaces, and peripheral buses |
| DCDC2 Output (VDCDC2) | Selectable 1.0-V/1.3-V core rail | DEFDCDC2 = low → 1.0 V; DEFDCDC2 = high → 1.3 V; feeds CPU/GPU cores |
| VLDO1 / VLDO2 | 400-mA LDO outputs | Configurable via DEFLDO1–DEFLDO4; support 1–3.6 V range; high PSRR critical for noise-sensitive analog blocks |
| VLDO3 / VLDO4 | 200-mA LDO outputs | Digital LDO voltage selection; lower current rating allows smaller bypass caps and reduced board area |
| EN_DCDC1 / EN_DCDC2 | Active-high enable inputs | Enable independent power sequencing; compatible with GPIOs or PMIC-controlled reset signals |
| EN_LDO1–EN_LDO4 | Active-high LDO enable inputs | Allow dynamic rail shutdown during sleep states; each LDO has dedicated control for fine-grained power management |
| MODE | PFM/PWM mode select | Low = automatic PFM/PWM transition; high = forced PWM for constant-frequency EMI control |
| DEFDCDC2 | DCDC2 output voltage select | Logic-level input; sets VDCDC2 to 1.0 V (low) or 1.3 V (high); no external resistor needed |
| DEFLDO1–DEFLDO4 | LDO default voltage select | 4-bit digital bus (LSB→MSB) setting nominal LDO output voltages per TI's default table |
Key Features
| Feature | Design Value |
|---|---|
| 1-A DCDC1 + 600-mA DCDC2 | Enables full-system power delivery from single Li-ion cell without external regulators or cascaded stages |
| Digital LDO voltage selection | Eliminates external resistor dividers and trim pots; simplifies BOM and improves production yield |
| 2.25-MHz fixed-frequency operation | Reduces EMI filtering complexity and allows miniaturized magnetics (<2.2 μH) and ceramics (<22 μF) |
| 100% duty-cycle capability | Maintains regulation down to VIN – VOUT < 100 mV; critical for battery brownout resilience in portable devices |
| Integrated thermal shutdown (140°C) | Prevents damage during transient overloads or poor heatsinking; 20°C hysteresis avoids oscillation |
| 32-ms push-button debounce | Ensures reliable ON/OFF sequencing in handheld UIs without external RC networks or firmware debouncing |
Applications
| Smartphone Application Processor Supply | WLAN Baseband Power Management |
|---|---|
|
Use Scenario: Powers Samsung S3C24xx and OMAP™ application processors in smartphones with discrete I/O and core rails. IC Role / Device Role / Timing Role: Provides sequenced 3.3-V I/O rail (DCDC1) and 1.3-V core rail (DCDC2), plus four configurable LDOs for auxiliary functions. Use Value: Eliminates need for six discrete regulators; reduces PCB area by >40% versus discrete solution while maintaining ±1% DCDC accuracy. |
Use Scenario: Supplies regulated power to WLAN baseband ICs requiring multiple low-noise rails. IC Role / Device Role / Timing Role: Delivers 400-mA LDO1/LDO2 for RF front-end bias and 200-mA LDO3/LDO4 for digital control logic with 70-dB PSRR. Use Value: High PSRR suppresses switching noise from DC-DC converters, preventing WLAN sensitivity degradation and packet loss. |
| Portable Media Player System Power | Industrial Handheld Terminal Power |
|
Use Scenario: Manages power for audio codec, display driver, and NAND flash in portable media players. IC Role / Device Role / Timing Role: Uses EN_LDOx pins to dynamically enable/disable LDOs during playback, record, or standby states. Use Value: 32–40 μA quiescent current extends battery runtime in standby; digital LDO selection supports multi-voltage memory interfaces. |
Use Scenario: Powers ARM-based industrial terminals operating across –40°C to +85°C ambient range. IC Role / Device Role / Timing Role: Leverages RθJA = 37.3°C/W and thermal shutdown (140°C) for robust operation in sealed enclosures. Use Value: Exposed thermal pad and low RθJB (8°C/W) enable conduction cooling without heatsinks, reducing mechanical BOM cost. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power-management IC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65051RSMR | Same 32-pin VQFN package and pinout; DCDC1/DCDC2 both externally adjustable (no fixed 3.3-V or 1.0/1.3-V defaults) | Requires external feedback resistors for DCDC1/DCDC2; better for custom voltage scaling but increases BOM count | Select TPS65051RSMR when flexible DC-DC output tuning is required; TPS65056RSMR preferred for drop-in 3.3-V/1.3-V implementation |
| TPS65054RSMR | DCDC1 externally adjustable; DCDC2 fixed at 1.05 V/1.3 V (DEFDCDC2 logic reversed vs. TPS65056); identical LDO structure | 1.05-V DCDC2 suits newer low-voltage cores; incompatible DEFDCDC2 logic requires schematic revision | Choose TPS65054RSMR only if 1.05-V core rail is mandatory; verify DEFDCDC2 polarity and LDO default tables before substitution |
Compared with TPS65051RSMR and TPS65054RSMR, the TPS65056RSMR offers factory-programmed 3.3-V DCDC1 and 1.0/1.3-V DCDC2, eliminating external resistor networks and reducing design validation effort for volume smartphone and PMP platforms.
Availability
TPS65056RSMR is available at Aetrix Electronics and suitable for smartphone application processor supply, WLAN baseband power management, and portable media player system power requiring stable component supply, long-term lifecycle support, and qualified automotive-grade traceability.
Supply support for TPS65056RSMR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in power management, signal chain, and microcontrollers.
The TPS6505x product line was designed specifically for single-cell Li-Ion/Li-Polymer portable systems requiring tightly integrated, sequenced, and digitally configurable multi-rail power solutions for application processors and baseband ICs.
FAQ
What is the DCDC1 output voltage of the TPS65056RSMR?
The TPS65056RSMR has a fixed 3.3-V output on DCDC1, optimized for processor I/O rails. Unlike adjustable variants such as TPS65051RSMR, it does not require external feedback resistors. This simplifies layout and ensures consistent performance across production units without calibration. The TPS65056RSMR maintains ±1% accuracy in PWM mode across 2.5–6 V input and full load range.
How does the DEFDCDC2 pin configure DCDC2 output on the TPS65056RSMR?
On the TPS65056RSMR, the DEFDCDC2 pin is a logic-level input that selects between two fixed DCDC2 output voltages: 1.0 V (when DEFDCDC2 = low) or 1.3 V (when DEFDCDC2 = high). This eliminates external resistor programming and supports rapid core voltage selection for different operating modes. The TPS65056RSMR datasheet confirms this behavior is exclusive to TPS65052/TPS65054/TPS65056 variants.
Does the TPS65056RSMR support power sequencing control?
Yes, the TPS65056RSMR supports full external power sequencing via individual enable pins: EN_DCDC1, EN_DCDC2, EN_LDO1 through EN_LDO4. Each is active-high and compatible with standard GPIOs or dedicated PMIC sequencers. This allows precise startup/shutdown order-for example, enabling DCDC1 before LDOs to avoid backfeed-and is validated in TI's TPS65056RSMR reference designs for OMAP™ platforms.
What is the thermal performance of the TPS65056RSMR in its VQFN package?
The TPS65056RSMR in the 32-pin VQFN (RSM) package has RθJA = 37.3°C/W and RθJB = 8°C/W, measured on a standard JEDEC high-K test board. Its exposed thermal pad must be soldered to a solid GND plane for optimal heat dissipation. At 1-A DCDC1 load and 600-mA DCDC2 load, junction temperature rise remains within safe limits (<125°C) under 85°C ambient with minimal copper area-verified in TI's SLVS710C thermal characterization data.
Can the TPS65056RSMR operate in forced PWM mode?
Yes, the TPS65056RSMR enters forced PWM mode when the MODE pin is pulled high, disabling automatic PFM-to-PWM transition. This ensures constant 2.25-MHz switching frequency for predictable EMI filtering and reduced acoustic noise in sensitive audio applications. In PFM mode (MODE = low), quiescent current drops to 32–40 μA, extending battery life during light-load standby-both modes are fully supported and characterized in the TPS65056RSMR datasheet.
TPS65056RSMR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Mobile/OMAP™
- Current - Supply:
- 1.25mA
- Voltage - Supply:
- 1.5V ~ 6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-VQFN (4x4)
TPS65056RSMR FAQ
1.How can I place an order for TPS65056RSMR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65056RSMR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65056RSMR reliable?
The price and inventory of TPS65056RSMR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65056RSMR is usually 5 days.
3.What payment methods are accepted for TPS65056RSMR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65056RSMR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS65056RSMR?
TPS65056RSMR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65056RSMR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65056RSMR?
For technical support, including TPS65056RSMR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65056RSMR requirements.
6.How does Aetrix verify that TPS65056RSMR is sourced from the original manufacturer or authorized distributors?
All TPS65056RSMR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65056RSMR meets industry standards.
7.What is the process for return or replacement of TPS65056RSMR?
All TPS65056RSMR units undergo pre-shipment inspection (PSI). If there is an issue with TPS65056RSMR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65056RSMR part is unused and in its original packaging.
Return procedure for TPS65056RSMR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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