Texas Instruments TPS65058RGET
- Part No.:
- TPS65058RGET
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
TPS65058RGET.pdf
- Description:
- IC DUAL STP-DN CONV 3-LDO 24VQFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,820
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Product details
Overview
TPS65058RGET from Texas Instruments is a highly integrated power management IC (PMIC) for single-cell Li-Ion/Li-Polymer systems, featuring two 2.25 MHz synchronous step-down converters (DCDC1: 0.6A, DCDC2: 1A) and three low-input-voltage LDOs (VLDO1: 400mA, VLDO2/VLDO3: 200mA each), all in a 4 mm × 4 mm 24-pin QFN package. It delivers dynamic voltage switching for processor core/I/O rails in satellite radio modules and portable embedded systems.
For engineers reviewing the TPS65058RGET datasheet, TPS65058RGET pinout, TPS65058RGET application, or TPS65058RGET equivalent, key selection considerations include its dual-converter phase alignment, PFM/PWM mode control via MODE pin, output voltage programmability via DEF pins, and thermal shutdown at 150°C with 20°C hysteresis.
Technical Context
The TPS65058RGET implements two synchronous buck converters operating at a fixed 2.25 MHz frequency with 180° out-of-phase switching to reduce input RMS current and enable smaller input capacitors. Each converter supports 100% duty cycle operation for ultra-low dropout and includes internal P-channel (250–500 mΩ) and N-channel (180–250 mΩ) MOSFETs with current limiting (1.15–1.65 A).
It integrates three independent LDOs with programmable outputs: VLDO1 fixed at 3.3 V, VLDO2 selectable between 1.8 V/1.2 V, and VLDO3 between 1.8 V/1.3 V - all enabled individually via EN_LDOx pins and supporting 1.5 V to 6.5 V input range. A dedicated reset generator provides 100 ms delay with open-drain active-low RESET output.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Switching Frequency | 2.25 MHz ±10% - enables use of small 1.5–2.2 µH inductors and 10–22 µF ceramic output capacitors. |
| DCDC1 Output Current | 600 mA - supports I/O rail supply with ±1% accuracy in PWM mode and ±2% in PFM mode. |
| DCDC2 Output Current | 1000 mA - powers processor core with dynamic voltage switching (1.2 V / 1.8 V) via DEF_DCDC2 pin. |
| LDO1 Output | 3.3 V / 400 mA - general-purpose rail with 280 mV dropout at full load and 70 dB PSRR at 10 kHz. |
| Quiescent Current | 32 µA typical (both DC/DC active, no LDOs) - enables >95% efficiency at light loads via automatic PFM entry. |
| Operating Temperature | –40°C to +85°C - qualified for industrial ambient conditions with thermal shutdown at 150°C. |
| Package | 24-pin QFN (RGE), 4 mm × 4 mm, 0.5 mm pitch - exposes PowerPAD™ for enhanced thermal dissipation (θJA = 35 K/W). |
Pinout & Package
TPS65058RGET is housed in a thermally enhanced 24-pin QFN (RGE) package with exposed PowerPAD™ connected to AGND/PGND. Pin numbering follows top-view layout with pins 1–24 arranged in clockwise order starting from top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC (1, 6) | Power supply input | Bias rail for internal digital/analog circuitry; must be tied to VINDCDC1/2. |
| EN_DCDC1 (20) | Digital enable input | Active-high control for DCDC1; logic high enables switching, low disables with 9–12 µA shutdown current. |
| FB_DCDC1 (19) | Analog feedback input | Resistor-divider node setting DCDC1 output voltage (e.g., 3.3 V); requires external resistors per design. |
| MODE (23) | Operating mode select | GND = automatic PFM/PWM transition; VIN = forced fixed-frequency PWM for noise-sensitive applications. |
| DEF_DCDC2 (5) | Output voltage configuration | Logic high selects 1.8 V, low selects 1.2 V for DCDC2 - enables dynamic core voltage scaling. |
| RESET (10) | Open-drain status output | Active-low reset signal asserted until both DC/DC outputs reach 95% of nominal value (100 ms delay). |
| AGND (24) | Analog ground reference | Must be connected to PGND1/PGND2 and PowerPAD™ to minimize noise coupling into feedback paths. |
Key Features
| Feature | Design Value |
|---|---|
| 180° out-of-phase dual-buck operation | Reduces input ripple current by ~30%, allowing smaller 22 µF input capacitor instead of dual 10 µF caps. |
| Dynamic voltage positioning (DVP) | Maintains output 1% above nominal in PFM mode to minimize undershoot during load transients from light to heavy. |
| Individual LDO enable/control | Three independent EN_LDOx pins allow sequenced power-up and selective rail shutdown for system-level power gating. |
| Integrated reset generator | Monitors PGOOD1/PGOOD2 internally and asserts RESET only after both DC/DC outputs stabilize within tolerance. |
| 100% duty cycle capability | Enables regulation down to VIN – VOUT ≈ 280 mV at full load, extending battery runtime in Li-ion discharge tail. |
Applications
| Satellite Radio Modules | Portable Media Players |
|---|---|
Use Scenario: Compact handheld satellite radio receiver powered by single Li-Po cell with strict EMI and size constraints. IC Role / Device Role / Timing Role: PMIC supplies 3.3 V I/O rail (DCDC1), 1.2/1.8 V processor core (DCDC2), and 3.3 V/1.8 V analog/audio LDOs (VLDO1–VLDO3). Use Value: 2.25 MHz switching allows <4 mm² total solution size; PFM mode extends playback time by 22% versus fixed PWM at standby. |
Use Scenario: Battery-powered media player requiring sequenced power-up of SoC, display, and audio codec. IC Role / Device Role / Timing Role: Central power controller delivering dynamic core voltage (DCDC2), stable I/O (DCDC1), and isolated analog rails (LDOs) with independent enable timing. Use Value: Individual EN_LDOx pins enable precise power sequencing; RESET output coordinates firmware initialization after all rails stabilize. |
| Industrial Handheld Terminals | Wearable Health Monitors |
Use Scenario: Ruggedized barcode scanner operating across –20°C to +70°C with cold-temperature battery derating. IC Role / Device Role / Timing Role: Dual-buck regulator maintains 3.3 V I/O and 1.8 V MCU core despite Li-ion voltage sag from 4.2 V to 2.8 V. Use Value: 100% duty cycle operation sustains regulation down to 2.5 V input; thermal shutdown (150°C) prevents damage during extended field use. |
Use Scenario: Ultra-low-power wearable ECG sensor with intermittent Bluetooth transmission bursts. IC Role / Device Role / Timing Role: Supplies 3.3 V BLE radio (VLDO1), 1.8 V sensor interface (VLDO2), and 1.3 V ADC reference (VLDO3), all independently gated. Use Value: 32 µA quiescent current minimizes standby drain; PFM mode ensures <15 µVPP ripple on analog LDOs during signal acquisition. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multi-rail power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65053RGER | Same 24-pin QFN package and pinout; lacks VLDO3 and RESET output; DCDC2 max current = 800 mA. | Targeted at cost-sensitive designs where third LDO and system reset are unnecessary. | Select when only two LDOs and no reset monitoring are required - reduces BOM count but sacrifices rail flexibility. |
| TPS65023RSBR | 3.5 mm × 3.5 mm 40-pin QFN; adds USB OTG support and higher LDO currents (up to 600 mA); operates up to 5.5 V input. | Designed for smartphones/tablets with USB charging and higher power demands. | Choose for systems needing USB power path management or >1 A total LDO current - not drop-in due to different pin count and footprint. |
Compared with TPS65058RGET, TPS65053RGER offers identical layout compatibility but reduced integration, while TPS65023RSBR provides expanded functionality at the cost of larger size and non-interchangeable packaging - making TPS65058RGET optimal for space-constrained, triple-LDO satellite radio and portable media applications.
Availability
TPS65058RGET is available at Aetrix Electronics and suitable for satellite radio modules, portable media players, industrial handheld terminals, and wearable health monitors requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for TPS65058RGET includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with decades of expertise in power management IC design for battery-powered systems.
The TPS65058 product line was engineered specifically for single-cell Li-Ion/Li-Polymer applications demanding compact, efficient, and flexible multi-rail power delivery - targeting satellite radio, portable media, and industrial handheld markets.
FAQ
What is the maximum input voltage rating for TPS65058RGET?
The absolute maximum input voltage on all pins except AGND, PGND, and EN_LDO1 is –0.3 V to 7 V. For EN_LDO1, the limit is –0.3 V to VCC + 0.5 V. Recommended operating range for VINDCDC1/2 and LDO inputs is 2.5 V to 6 V and 1.5 V to 6.5 V respectively - staying within these ensures reliable operation of TPS65058RGET without risk of latch-up or permanent damage.
How does the MODE pin affect TPS65058RGET operation?
The MODE pin on TPS65058RGET selects between automatic PFM/PWM mode (MODE = GND) and forced fixed-frequency PWM mode (MODE = VIN). In PFM mode, TPS65058RGET achieves ultra-low quiescent current (32 µA typical) at light loads; in forced PWM, it maintains constant 2.25 MHz switching for predictable EMI and improved transient response - critical for noise-sensitive analog circuits.
Can TPS65058RGET support dynamic voltage scaling for processor cores?
Yes - TPS65058RGET supports dynamic voltage scaling via the DEF_DCDC2 pin, which configures DCDC2 output between 1.2 V and 1.8 V. This enables real-time adjustment of the processor core supply voltage based on performance requirements, reducing power consumption during low-activity states while maintaining stability - a key capability implemented directly in TPS65058RGET's control architecture.
What is the purpose of the PowerPAD™ on the TPS65058RGET package?
The PowerPAD™ on the TPS65058RGET's RGE package is an exposed thermal pad that must be soldered to a PCB copper pour connected to AGND/PGND. It reduces thermal resistance (θJA = 35 K/W) and improves power dissipation - essential for sustaining 1 A output on DCDC2 under continuous load. Without proper PowerPAD™ connection, TPS65058RGET may exceed junction temperature limits and trigger thermal shutdown.
Does TPS65058RGET provide power-good monitoring for both DC/DC converters?
Yes - TPS65058RGET includes internal PGOOD1 and PGOOD2 monitoring for DCDC1 and DCDC2, respectively. These signals feed a dedicated reset generator that asserts the open-drain RESET pin only after both outputs reach and maintain ≥95% of their nominal voltages for 100 ms. This coordinated power-good behavior ensures deterministic system startup and is intrinsic to TPS65058RGET's fault-monitoring architecture.
TPS65058RGET Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Handheld/Mobile Devices
- Current - Supply:
- -
- Voltage - Supply:
- 2.5V ~ 6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-VQFN (4x4)
TPS65058RGET FAQ
1.How can I place an order for TPS65058RGET through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65058RGET on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65058RGET reliable?
The price and inventory of TPS65058RGET are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65058RGET is usually 5 days.
3.What payment methods are accepted for TPS65058RGET?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS65058RGET transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS65058RGET?
TPS65058RGET orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65058RGET order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65058RGET?
For technical support, including TPS65058RGET datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65058RGET requirements.
6.How does Aetrix verify that TPS65058RGET is sourced from the original manufacturer or authorized distributors?
All TPS65058RGET products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65058RGET meets industry standards.
7.What is the process for return or replacement of TPS65058RGET?
All TPS65058RGET units undergo pre-shipment inspection (PSI). If there is an issue with TPS65058RGET, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65058RGET part is unused and in its original packaging.
Return procedure for TPS65058RGET:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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