Texas Instruments TPS65161BPWPR
- Part No.:
- TPS65161BPWPR
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 28-PowerTSSOP (0.173", 4.40mm Width)
- Datasheet:
-
TPS65161BPWPR.pdf
- Description:
- IC PS FOR TV/LCD PANEL 28HTSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS65161BPWPR from Texas Instruments is a highly integrated bias power supply IC for TFT LCD panels, delivering four regulated rails: VS (up to 19 V/1.3 A), V(LOGIC) (3.3 V/2.3 A), VGH (+32 V/50 mA), and VGL (−5 V/50 mA). It integrates a 750-kHz boost converter, 500-kHz step-down converter, and dual regulated charge pumps - all synchronized to a single clock. Designed for large-screen LCD TVs and monitors, it supports adjustable sequencing and external MOSFET gate drive for isolation.
For engineers reviewing the TPS65161BPWPR datasheet, TPS65161BPWPR pinout, TPS65161BPWPR application, or TPS65161BPWPR equivalent, key selection criteria include its 3.7-A boost switch current limit, 200-mA charge pump output capability, 8–14.7-V input range, HTSSOP-28 PowerPAD™ package with thermal pad tied to PGND, and programmable 500/750-kHz switching frequency via FREQ pin.
Technical Context
The TPS65161BPWPR employs a voltage-mode PWM architecture with input voltage feedforward in both boost and buck converters, enabling tight line/load regulation (0.03%/A typical) and stable operation with ceramic output capacitors. Its unique boost topology uses an internal P-MOSFET (rDS(on) ≤16 Ω) in parallel with an external Schottky diode to sustain continuous conduction mode across full load range - eliminating light-load ringing and simplifying compensation.
All four power rails share a central clock; FREQ pin selects 500 kHz (low) or 750 kHz (high), directly affecting efficiency vs. transient response trade-off. Sequencing is controlled by DLY1/DLY2 pins (capacitor-programmable delays), while GD provides open-drain gate drive latched low when VS reaches ±8% regulation - enabling external MOSFET control for VS/VGH isolation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 8 V to 14.7 V - compatible with standard 12-V supply rails in LCD TV/monitor systems |
| VS Output | Up to 19 V / 1.3 A - main source voltage for TFT panel source drivers |
| V(LOGIC) Output | 3.3 V / 2.3 A with 1.5% accuracy - powers panel timing controller and logic circuitry |
| VGH / VGL Outputs | +32 V / 50 mA and −5 V / 50 mA - TFT gate-on/off bias voltages with adjustable sequencing |
| Switch Current Limit | 3.7 A (boost N-MOSFET Q1) - enables higher peak loads on VS rail vs. TPS65161 (2.8 A) |
| Charge Pump Current | 200 mA (TPS65161B only) - doubles negative/positive pump drive vs. base TPS65161 (100 mA) |
| UVLO Threshold | 8 V (rising), 6.4 V (falling) - higher lockout than TPS65161 (6 V) improves brownout immunity |
| Switching Frequency | 500 kHz or 750 kHz (FREQ-pin selectable) - balances EMI, efficiency, and component size |
Pinout & Package
TPS65161BPWPR is housed in a thermally enhanced 28-pin HTSSOP (PWP) package with exposed PowerPAD™ soldered to PGND for optimal thermal performance. Pin numbering follows standard TI HTSSOP layout; Pin 1 is FB (top-left corner), and Pin 28 is SS (bottom-right corner). The PowerPAD must be electrically and thermally connected to PGND.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| FB (1) | Boost converter feedback input | Regulates VS output via external resistor divider; VFB = 1.146 V (typ) |
| COMP (2) | Boost converter compensation node | Connects external RC network to stabilize loop; critical for transient response |
| OS (3) | Overvoltage protection sense | Direct connection to VS output; triggers shutdown if >20 V (OVP threshold) |
| SW / SW (4,5) | Boost converter switch nodes | Drive external inductor/diode; high-current paths requiring low-inductance layout |
| PGND (6,7) | Power ground return | High-current return for boost/buck switches; must be low-impedance path to PowerPAD |
| SUP (8) | Positive charge pump supply | Accepts VIN or VS - determines VGH output range (e.g., VS + VIN yields higher VGH) |
| EN2 (9) | Boost & VGH enable input | Active-high; initiates VS/VGH startup after V(LOGIC) regulation and DLY2 delay |
| DRP (10) | VGH charge pump drive output | Drives external flying capacitor; current-limited to support 200-mA VGH output |
| DRN (11) | VGL charge pump drive output | Drives external flying capacitor; current-limited to support 200-mA VGL output |
| FREQ (12) | Frequency select input | Logic level sets oscillator: low = 500 kHz, high = 750 kHz |
| FBN (13) | VGL feedback input | Regulates negative output; V(FBN) = 0 V (nominal); feedback error < ±36 mV |
| FBP (14) | VGH feedback input | Regulates positive output; V(FBP) = 1.213 V (ref); precision matching to REF pin |
| FBB (15) | V(LOGIC) feedback input | Regulates buck output; V(FBB) = 1.213 V (ref); matches REF for system stability |
| EN1 (16) | Buck & VGL enable input | Active-high; starts V(LOGIC)/VGL after DLY1 delay; required before EN2 assertion |
| BOOT (17) | Buck high-side gate drive bootstrap | Connects to SWB via capacitor; generates >8-V gate drive for internal N-MOSFET Q5 |
| SWB (18) | Buck converter switch node | Drives buck inductor; requires low-ESR ceramic output cap and proper layout |
| NC (19) | No connect | Not internally bonded; must remain unconnected per datasheet |
| VINB (20,21) | Buck converter input | Dedicated 12-V input for V(LOGIC) rail; separate from main VINB path to reduce coupling |
| AVIN (22) | Analog supply input | Powers internal references and comparators; bypass with 1-μF ceramic cap |
| GND (23) | Analog ground reference | Separate from PGND; connects to REF, FBB, FBN, FBP for noise-sensitive analog circuits |
| REF (24) | Internal 1.213-V reference output | Stable bandgap reference; requires 220-nF capacitor to GND for noise filtering |
| DLY1 (25) | V(LOGIC)→VGL delay timer | Capacitor-to-GND sets delay between V(LOGIC) ramp-up and VGL activation |
| DLY2 (26) | V(LOGIC)→VS/VGH delay timer | Capacitor-to-GND sets delay between V(LOGIC) regulation and VS/VGH startup |
| GD (27) | External MOSFET gate drive | Open-drain output latched low when VS is within ±8%; resets on EN2 toggle |
| SS (28) | Boost soft-start control | Capacitor-to-GND sets soft-start time; constant-current charging controls current limit ramp |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 4-rail power solution | Eliminates need for discrete DC/DC + charge pump ICs - reduces BOM count and PCB area in TFT LCD designs |
| Adjustable power sequencing | DLY1/DLY2 pins allow independent timing control of VLOGIC→VGL and VLOGIC→VS/VGH, preventing panel latch-up |
| Enhanced charge pump capability | 200-mA drive current (TPS65161B only) enables higher VGH/VGL load currents vs. 100-mA in TPS65161 |
| Robust protection suite | Includes overvoltage protection (20 V), thermal shutdown (155°C), short-circuit protection, and undervoltage lockout |
| Thermally optimized HTSSOP-28 | PowerPAD™ package achieves 28°C/W junction-to-ambient thermal resistance (with proper PCB copper) |
| Programmable switching frequency | FREQ pin allows 500/750-kHz selection - optimizing for efficiency (lower f) or transient response (higher f) |
Applications
| Large-Screen LCD TV Panels | Desktop Monitor TFT Displays |
|---|---|
Use Scenario: Powering 32–65-inch LCD TV panels requiring high-current VS (≥1.3 A), precise VGH/VGL bias, and robust sequencing. IC Role / Device Role / Timing Role: Central bias supply IC generating all four panel voltages with synchronized clock and programmable startup delays. Use Value: Enables single-chip solution for high-power panels, reducing board space and eliminating discrete charge pump ICs while supporting 200-mA VGH/VGL loads. |
Use Scenario: Supplying 24–32-inch monitor panels with strict EMI limits and thermal constraints in compact enclosures. IC Role / Device Role / Timing Role: Integrated power manager delivering regulated VS, VLOGIC, VGH, VGL with 500-kHz option for lower EMI and improved efficiency. Use Value: FREQ-pin selectable frequency allows designers to meet CISPR-32 Class B emissions without added shielding or filters. |
| Industrial HMI LCD Modules | Medical Imaging Display Systems |
Use Scenario: Powering ruggedized human-machine interface displays operating across –40°C to 85°C ambient range. IC Role / Device Role / Timing Role: High-reliability bias supply with thermal shutdown, UVLO hysteresis, and wide-input operation for industrial environments. Use Value: 8–14.7-V input range and 155°C thermal shutdown ensure stable operation under variable 12-V bus conditions and extended duty cycles. |
Use Scenario: Driving high-resolution diagnostic displays requiring ultra-stable VGH/VGL for consistent pixel response and grayscale fidelity. IC Role / Device Role / Timing Role: Precision-regulated bias generator with 1.5% VLOGIC accuracy and matched 1.213-V internal references (REF/FBB/FBP/FBN). Use Value: Tight reference matching minimizes inter-rail drift, preserving display contrast ratio and color accuracy over temperature and time. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar TFT LCD bias supply applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65161APWPR | Same 3.7-A boost switch limit and 100-mA charge pump current; UVLO threshold 6 V (vs. 8 V on TPS65161B) | Lacks 200-mA VGH/VGL drive; suitable where panel load <100 mA and brownout immunity is less critical | Select when cost sensitivity outweighs need for higher charge pump current or tighter UVLO hysteresis |
| TPS65165PWPR | Higher VS current (2.5 A), integrated LDO for AVDD, but no GD pin or DLY2; fixed 750-kHz frequency only | Targets smaller panels (<24") with simpler sequencing; lacks external MOSFET gate drive for isolation | Choose for compact designs needing AVDD rail and simplified layout - not for large panels requiring GD-controlled isolation |
Compared with TPS65161APWPR, TPS65161BPWPR adds 200-mA charge pump drive and higher UVLO for improved reliability in noisy 12-V systems; versus TPS65165PWPR, it retains full sequencing control and GD functionality essential for high-end LCD TV power trees.
Availability
TPS65161BPWPR is available at Aetrix Electronics and suitable for large-screen LCD TV panels, desktop monitor TFT displays, and industrial HMI modules requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for TPS65161BPWPR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in display power solutions.
The TPS65161 family was designed specifically for TFT LCD panel bias supplies - integrating boost, buck, and dual charge pumps into one IC to replace multi-chip solutions in TV and monitor applications.
FAQ
What is the maximum output voltage and current capability of the VS rail on the TPS65161BPWPR?
The TPS65161BPWPR supports a VS output voltage up to 19 V with a maximum continuous output current of 1.3 A. This is enabled by its 3.7-A N-MOSFET switch current limit (Q1), internal overvoltage protection at 20 V, and thermal design rated for 1.42 W at 85°C ambient. The VS rail powers TFT source drivers and is regulated via the FB pin with 1.146-V feedback threshold.
How does the TPS65161BPWPR differ from the TPS65161PWP in terms of charge pump performance?
The TPS65161BPWPR delivers 200-mA drive current to both VGH and VGL charge pumps - double the 100-mA capability of the base TPS65161PWP. This enables higher load currents on bias rails without external amplification, critical for larger panels. The TPS65161BPWPR also features an elevated 8-V undervoltage lockout threshold versus 6 V on the TPS65161PWP, improving system robustness during input transients.
Can the TPS65161BPWPR support adjustable power sequencing between VLOGIC, VGL, VS, and VGH?
Yes, the TPS65161BPWPR supports fully adjustable sequencing using external capacitors on DLY1 and DLY2 pins. DLY1 sets the delay from V(LOGIC) regulation to VGL activation; DLY2 sets the delay from V(LOGIC) regulation to VS/VGH startup. This prevents panel damage due to improper voltage ramp order - a critical requirement for TFT LCDs where VGL must be established before VGH and VS.
What package type and thermal characteristics does the TPS65161BPWPR use?
The TPS65161BPWPR uses the HTSSOP-28 (PWP) package with an exposed PowerPAD™ thermally connected to PGND. With proper PCB copper pour, it achieves a junction-to-ambient thermal resistance (RθJA) of 28°C/W. At 85°C ambient, its maximum allowable power dissipation is 1.42 W - sufficient for full-load operation in well-ventilated LCD TV backlights and monitor enclosures.
Does the TPS65161BPWPR include protection features for system reliability?
Yes, the TPS65161BPWPR integrates multiple protection features: overvoltage protection (20 V on VS), thermal shutdown (155°C with 5°C hysteresis), cycle-by-cycle short-circuit protection on the buck converter, and undervoltage lockout (6.4 V falling, 8 V rising). These ensure safe operation during fault conditions such as feedback disconnection, output overload, or ambient overheating - critical for unattended LCD TV deployments.
TPS65161BPWPR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 28-PowerTSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- LCD TV/Monitor
- Current - Supply:
- -
- Voltage - Supply:
- 8V ~ 14.7V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-HTSSOP
TPS65161BPWPR FAQ
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Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65161BPWPR?
For technical support, including TPS65161BPWPR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65161BPWPR requirements.
6.How does Aetrix verify that TPS65161BPWPR is sourced from the original manufacturer or authorized distributors?
All TPS65161BPWPR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65161BPWPR meets industry standards.
7.What is the process for return or replacement of TPS65161BPWPR?
All TPS65161BPWPR units undergo pre-shipment inspection (PSI). If there is an issue with TPS65161BPWPR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65161BPWPR part is unused and in its original packaging.
Return procedure for TPS65161BPWPR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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