Texas Instruments TPS651851RSLT

Overview

TPS651851RSLT from Texas Instruments is a highly integrated power-management IC (PMIC) engineered exclusively for E Ink® Vizplex™ electronic paper displays. It delivers ±15-V source driver rails (VPOS/VNEG), ±22-V/–20-V gate driver supplies (VDDH/VEE), adjustable VCOM (0 V to –5.11 V, ±1.5% accuracy), and a 3.3-V load switch - all from a single 3-V to 6-V input. It supports 9.7-inch+ panels in e-readers and dual-display tablets.

For engineers reviewing the TPS651851RSLT datasheet, TPS651851RSLT pinout, TPS651851RSLT application, or TPS651851RSLT equivalent, this page provides verified specifications including LDO current capability (200 mA at VIN ≥3.6 V), I²C-programmable VCOM with 9-bit resolution, active discharge on all rails, thermal monitoring via TS pin, and RSL 48-pin VQFN package details.

Technical Context

The TPS651851RSLT integrates two high-efficiency DC-DC converters: a boost regulator (DCDC1) generating +16 V base rail for VDDH charge pump, and an inverting buck-boost (DCDC2) generating –16 V base rail for VEE charge pump. Each charge pump delivers programmable output (VDDH up to +28 V, VEE down to –21 V) with ±2% feedback accuracy and 560-kHz switching.

Its dual tracking LDOs (LDO1/LDO2) regulate VPOS and VNEG with ±50-mV inter-rail matching, while the VCOM amplifier supports panel kickback measurement and EEPROM-stored calibration. All rails feature independent enable/discharge control via dedicated pins (e.g., VPOS_DIS, VEE_DIS, VCOM_DIS) and are managed through a standard 400-kHz I²C interface (7-bit address 0x68).

Key Specifications

Pinout & Package

RSL package is a 48-pin, 6.0 mm × 6.0 mm, 0.4-mm pitch VQFN with exposed thermal pad electrically connected to PBKG (Pin 22), which must be tied to VN (–16 V) for optimal heat dissipation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar E Ink display power management applications.

Compared with TPS65185RSLT, the TPS651851RSLT provides higher LDO current and DC-DC robustness for larger panels, while TPS65186RSLT adds EEPROM and LCD support - making TPS651851RSLT the optimal balance of performance, compatibility, and cost for mainstream Vizplex designs.

Availability

TPS651851RSLT is available at Aetrix Electronics and suitable for e-book readers, dual-display tablets, OMAP-based EPD reference designs, and industrial electronic shelf labels requiring stable component supply across multi-year production cycles.

Supply support for TPS651851RSLT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with over 50 years of innovation in energy-efficient electronics.

The TPS65185x product line was designed specifically to consolidate power delivery for E Ink Vizplex electronic paper displays - addressing the unique requirements of low-noise, tightly tracked bipolar rails, programmable VCOM, and ultra-low quiescent current in portable applications.

FAQ

What is the maximum load current supported by the VPOS and VNEG LDOs in the TPS651851RSLT?

The TPS651851RSLT delivers 200 mA from both VPOS and VNEG LDOs when input voltage (VIN) is ≥3.6 V. Below 3.6 V, the LDO current capability drops to 150 mA. This is confirmed in Section 7.5 of the SLVSAQ8G datasheet under "LDO1 (VPOS)" and "LDO2 (VNEG)" electrical characteristics, and differentiates it from the TPS65185RSLT, which is limited to 120 mA regardless of VIN.

Does the TPS651851RSLT support automatic VCOM calibration, and how is it implemented?

Yes, the TPS651851RSLT supports automatic panel kickback voltage measurement to determine optimal VCOM bias - eliminating manual calibration. The process is initiated via I²C command, measures the panel's inherent voltage offset, and stores the result in on-chip non-volatile memory. On subsequent power-ups, the stored value becomes the default VCOM setting, ensuring consistent display performance across units and production batches.

What package type and thermal considerations apply to the TPS651851RSLT?

The TPS651851RSLT uses the RSL package: a 48-pin VQFN (6.0 mm × 6.0 mm, 0.4-mm pitch) with an exposed thermal pad. Per datasheet Section 6 and 7.4, the thermal pad is internally connected to PBKG (Pin 22), which must be tied directly to the VN node (–16 V) using a short, wide copper trace - not to ground - to ensure effective heat dissipation and maintain R_θJB = 5.1°C/W.

Can the TPS651851RSLT generate gate driver voltages beyond ±20 V, and how is that configured?

Yes, the TPS651851RSLT's VDDH (positive) and VEE (negative) charge pumps are programmable beyond their nominal ±22 V / –20 V outputs. VDDH can be set to +25 V or +28 V, and VEE to –19 V or –21 V, by adjusting external feedback resistor ratios (R6/R10 for VDDH; R1/R2 for VEE) as specified in the "CP1 (VDDH) CHARGE PUMP" and "CP2 (VEE) NEGATIVE CHARGE PUMP" sections of the datasheet.

How does the TPS651851RSLT handle thermal protection, and what is the trip threshold?

The TPS651851RSLT incorporates junction thermal shutdown that activates at 150°C with 20°C hysteresis, as stated in Section 7.5 "THERMAL SHUTDOWN". When triggered, all output rails disable and the device remains latched off until junction temperature falls below 130°C. This protects both the IC and connected E Ink panel from thermal damage during sustained high-load or poor heatsinking conditions.