Texas Instruments TPS65185RGZR
- Part No.:
- TPS65185RGZR
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
TPS65185RGZR.pdf
- Description:
- IC PWR MGMT E INK 48VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS65185RGZR from Texas Instruments is a highly integrated power management IC (PMIC) engineered exclusively for E Ink® Vizplex™ electronic paper displays. It delivers ±15-V source driver rails (VPOS/VNEG), ±22-V/–20-V gate driver supplies (VDDH/VEE), and programmable VCOM bias (0 V to –5.11 V) from a single 3-V to 6-V input, supporting 9.7-inch and larger panels in e-readers and dual-display tablets.
For engineers reviewing the TPS65185RGZR datasheet, TPS65185RGZR pinout, TPS65185RGZR application, or TPS65185RGZR equivalent, this device requires attention to its I²C-programmable VCOM tracking (±10 mV step), active rail discharge (800–1200 Ω), ±50-mV VPOS–VNEG tracking tolerance, thermal shutdown at 150°C, and RGZ 48-pin VQFN (7 mm × 7 mm) package with exposed thermal pad tied to VN.
Technical Context
The TPS65185RGZR integrates two high-efficiency DC-DC converters: a boost regulator (DCDC1) generating +16 V base for the VDDH charge pump, and an inverting buck-boost (DCDC2) generating –16 V base for the VEE charge pump. Both LDOs (VPOS/VNEG) are tracking regulators with ±1% output tolerance and 250-mV dropout at 120 mA load.
Its VCOM driver uses a 9-bit DAC (10-mV LSB) with ±1.5% accuracy and supports automatic kickback voltage measurement for factory calibration. All regulated outputs-VPOS, VNEG, VDDH, VEE, VCOM, and V3P3-feature dedicated discharge control pins and power-good monitoring via open-drain PWR_GOOD.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 3 V to 6 V - powers entire system from single Li-ion or USB-supplied rail without external pre-regulation. |
| VPOS / VNEG Output | ±15 V, 120 mA - dual-tracking LDOs with ±50-mV matching tolerance for precise source driver biasing. |
| VDDH / VEE Output | +22 V / –20 V, 15 mA - charge pumps driven by DCDC1/DCDC2 bases; support gate driver timing margins on large EPD panels. |
| VCOM Range & Accuracy | 0 V to –5.11 V, ±1.5% (±10 mV) - digitally adjustable backplane bias with 9-bit resolution for panel-specific optimization. |
| I²C Interface | 7-bit address 0x68h, 400-kHz max - enables real-time rail adjustment, VCOM calibration storage, and fault status readback. |
| Thermal Protection | 150°C trip point with 20°C hysteresis - prevents damage during sustained high-load operation on thermally constrained PCBs. |
| Package | RGZ (48-pin VQFN, 7 mm × 7 mm, 0.5-mm pitch) - exposes thermal pad electrically connected to PBKG/VN for efficient heat dissipation. |
Pinout & Package
RGZ package is a 48-pin VQFN (7.00 mm × 7.00 mm) with exposed thermal pad electrically tied to PBKG (Pin 22), which must be connected directly to the VN node (–16 V) via a short, wide copper trace for optimal thermal performance and electrical stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (10) | Main input supply | Accepts 3–6 V; powers internal logic, LDOs, and charge pump controllers; requires 10-µF input capacitor. |
| VPOS (44) / VNEG (3) | Source driver supply outputs | ±15-V regulated outputs with dedicated discharge pins (VPOS_DIS/ VNEG_DIS); each rated for 120 mA continuous. |
| VDDH_DRV (36) / VEE_DRV (28) | Charge pump driver outputs | Switch-node outputs driving external flying capacitors; require low-ESR ceramic caps and careful layout to minimize ringing. |
| VCOM (15) | Panel backplane bias output | Digitally programmable linear amplifier output; connects to 4.7-µF filter cap; supports sink/source current for dynamic panel settling. |
| SCL (17) / SDA (18) | I²C interface | Standard-mode (400 kHz) bidirectional bus; 7-bit slave address 0x68h; supports register read/write for all rail configurations and calibration data. |
| PWRUP (21) | Global enable control | Active-high signal that initiates full power-up sequence; must be asserted after WAKEUP to activate all regulated outputs. |
| TS (47) | Temperature sensing input | Connects to 10-kΩ NTC thermistor + 43-kΩ linearization resistor; enables panel temperature compensation and thermal derating. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated VCOM calibration engine | Automatically measures panel kickback voltage and stores result in non-volatile memory for consistent power-up default bias. |
| Programmable rail discharge | Dedicated DIS pins (VPOS_DIS, VNEG_DIS, VDDH_DIS, VEE_DIS, VCOM_DIS) enable controlled, impedance-matched (800–1200 Ω) discharge of all outputs. |
| Tracking LDO architecture | VPOS and VNEG share feedback topology ensuring ±50-mV absolute difference across temperature and load for stable EPD waveform fidelity. |
| Thermal-aware power sequencing | WAKEUP (5) enables I²C communication before PWRUP (21) activates rails; prevents spurious commands during cold start or sleep recovery. |
| Robust fault monitoring | Open-drain PWR_GOOD (23) asserts low if any critical rail (DCDC1, DCDC2, VCOM) falls out of regulation; supports system-level safety logic. |
Applications
| E-Book Reader Power System | Large-Format EPD Tablet |
|---|---|
Use Scenario: Portable battery-powered e-reader with 9.7-inch E Ink Vizplex display requiring ultra-low standby current and precise waveform timing. IC Role / Device Role / Timing Role: Single-chip PMIC generating all display bias rails (VPOS/VNEG/VDDH/VEE/VCOM) and managing power sequencing via I²C. Use Value: Eliminates discrete DC-DC + LDO + charge pump solution; reduces BOM count by >12 components while maintaining ±50-mV VPOS–VNEG tracking for flicker-free page turns. |
Use Scenario: Dual-display tablet using front E Ink and rear LCD, where EPD panel demands independent, dynamically adjustable bias voltages. IC Role / Device Role / Timing Role: Configurable EPD power subsystem enabling real-time VCOM adjustment and rail reconfiguration during mode switching (e.g., night/day mode). Use Value: 9-bit VCOM DAC (10-mV steps) and ±1.5% accuracy allow fine-tuned contrast optimization per panel batch; I²C interface enables firmware-driven calibration updates. |
| Industrial Electronic Shelf Label (ESL) | Medical Handheld EPD Terminal |
Use Scenario: Battery-operated ESL with multi-year lifetime requirement and ambient temperature range from –10°C to +60°C. IC Role / Device Role / Timing Role: Primary power controller delivering stable ±15-V source drivers and auto-calibrated VCOM under varying battery voltage (3.0–4.2 V). Use Value: 130-µA standby current (ISTD) and 3.5–10-µA sleep current (ISLEEP) extend shelf life; VCOM auto-calibration eliminates manual test station setup. |
Use Scenario: Sterile-field medical terminal using E Ink for glare-free, low-power patient data display in operating rooms. IC Role / Device Role / Timing Role: Safety-critical bias generator with thermal shutdown (150°C), rail power-good monitoring, and discharge-controlled shutdown to prevent residual voltage hazards. Use Value: Active discharge paths (800–1200 Ω) ensure rapid, predictable rail collapse during emergency power-off; TS pin supports ambient temperature derating per IEC 60601. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar E Ink display power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS651851RSLR | Same functional architecture but in 6-mm × 6-mm RSL package; delivers 200 mA on VPOS/VNEG (vs. 120 mA) when VIN ≥3.6 V; higher DCDC1 switch current limit (2.5 A vs. 1.5 A). | Preferred for higher-current panels or space-constrained layouts; not pin-compatible due to different pitch (0.4 mm vs. 0.5 mm) and body size. | Select TPS651851RSLR only if board redesign accommodates RSL footprint and higher output current is required. |
| MAX17135ETJ+ | 3-channel EPD PMIC with ±15-V LDOs, ±20-V charge pumps, and VCOM DAC; lacks integrated thermistor interface and auto-kickback calibration; uses SPI instead of I²C. | Used in legacy EPD designs with SPI-based host controllers; no built-in VCOM calibration engine or thermal linearization circuitry. | Choose MAX17135ETJ+ only when migrating from existing SPI-based platforms and VCOM auto-calibration is handled externally. |
Compared with TPS65185RGZR, the TPS651851RSLR offers higher current capability and smaller footprint but requires PCB redesign, while the MAX17135ETJ+ provides SPI compatibility and proven field reliability but omits key automation features like VCOM kickback measurement and thermal linearization-making TPS65185RGZR optimal for new designs prioritizing calibration efficiency and thermal robustness.
Availability
TPS65185RGZR is available at Aetrix Electronics and suitable for e-book readers, industrial electronic shelf labels, medical handheld EPD terminals, and dual-display tablets requiring stable component supply across long product lifecycles and varying ambient conditions.
Supply support for TPS65185RGZR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in energy-efficient IC design.
The TPS65185RGZR belongs to TI's E Ink-specific PMIC product line, designed to simplify power architecture for electronic paper displays by integrating all essential bias rails, sequencing logic, and calibration intelligence into one compact package.
FAQ
What is the maximum supported panel size for the TPS65185RGZR?
The TPS65185RGZR is explicitly qualified to support E Ink Vizplex panels up to 9.7 inches and larger, as confirmed in the official datasheet revision history and typical application schematics. Its ±15-V/120-mA LDOs, ±22-V/–20-V charge pumps, and programmable VCOM driver provide sufficient drive strength and voltage headroom for these panel dimensions without external boosting stages. Larger panels may require verification of gate/source driver loading against TPS65185RGZR's specified output current limits.
Does the TPS65185RGZR support automatic VCOM calibration?
Yes, the TPS65185RGZR includes an integrated automatic panel kickback voltage measurement feature that eliminates manual VCOM calibration during production. The device performs this measurement autonomously, stores the resulting value in non-volatile memory, and uses it as the default VCOM power-up setting. This function is enabled via I²C command and requires no external circuitry beyond the standard VCOM filter capacitor on Pin 15.
What is the purpose of the PBKG pin on the TPS65185RGZR?
The PBKG (Pin 22) on the TPS65185RGZR is the die substrate connection, internally tied to the VN node (–16 V). It must be connected via a short, wide copper trace directly to the VN net-not to ground-to ensure proper thermal dissipation and electrical stability. The exposed thermal pad underneath the RGZ package is also internally connected to PBKG, making this connection critical for both thermal performance and noise immunity in high-voltage EPD bias circuits.
Can the TPS65185RGZR operate with a 3.3-V input supply?
Yes, the TPS65185RGZR supports a minimum input voltage of 3 V, making it fully compatible with 3.3-V systems. At 3.3 V, the device maintains full functionality-including VPOS/VNEG regulation, VDDH/VEE charge pumping, and VCOM control-but output current capability for VPOS/VNEG is limited to 120 mA (per datasheet Section 7.5), and VCOM accuracy remains within ±1.5% across the full input range. Input UVLO triggers at 2.9 V with 400-mV hysteresis.
How does the TPS65185RGZR handle thermal protection?
The TPS65185RGZR incorporates junction-based thermal shutdown with a trip point of 150°C and 20°C hysteresis. When temperature exceeds the threshold, the device disables all regulated outputs (VPOS, VNEG, VDDH, VEE, VCOM) while retaining I²C communication capability. Once temperature falls below 130°C, normal operation resumes automatically. This behavior is documented in Section 7.5 of the datasheet and applies regardless of input voltage or load condition.
TPS65185RGZR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- E Ink®, Vizplex™
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- E Ink®, Vizplex™ Display, OMAP™
- Current - Supply:
- 5.5mA
- Voltage - Supply:
- 3V ~ 6V
- Operating Temperature:
- -10°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-VQFN (7x7)
TPS65185RGZR FAQ
1.How can I place an order for TPS65185RGZR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS65185RGZR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS65185RGZR reliable?
The price and inventory of TPS65185RGZR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS65185RGZR is usually 5 days.
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TPS65185RGZR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS65185RGZR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS65185RGZR?
For technical support, including TPS65185RGZR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS65185RGZR requirements.
6.How does Aetrix verify that TPS65185RGZR is sourced from the original manufacturer or authorized distributors?
All TPS65185RGZR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS65185RGZR meets industry standards.
7.What is the process for return or replacement of TPS65185RGZR?
All TPS65185RGZR units undergo pre-shipment inspection (PSI). If there is an issue with TPS65185RGZR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS65185RGZR part is unused and in its original packaging.
Return procedure for TPS65185RGZR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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