Texas Instruments TPS6590379ZWST
- Part No.:
- TPS6590379ZWST
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 169-LFBGA
- Datasheet:
-
TPS6590379ZWST.pdf
- Description:
- POWER MANAGEMENT IC (PMIC) FOR A
- Quantity:
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Product details
Overview
TPS6590379ZWST from Texas Instruments is a highly integrated power management unit (PMU) for processor-based systems, featuring seven configurable step-down SMPS regulators (including 6-A, 4-A, and dual/triple-phase configurations), seven general-purpose LDOs, a 16-MHz crystal oscillator, RTC, 12-bit GPADC, and programmable power sequencing. It delivers precise voltage scaling for memory, core, and I/O rails in industrial SoM applications.
For engineers reviewing the TPS6590379ZWST datasheet, TPS6590379ZWST pinout, TPS6590379ZWST application, or TPS6590379ZWST equivalent, key selection considerations include multi-phase DVS capability, OTP-configurable power-up/down sequences, differential remote sensing on high-current SMPS, Eco-mode quiescent current (15 µA), and dual I²C/SPI control interfaces for system-level power orchestration.
Technical Context
The TPS6590379ZWST implements a hierarchical power architecture with hardware- and software-controlled sequencing via one-time-programmable (OTP) registers. Its seven SMPS regulators support flexible phase configurations - including dual-phase (SMPS12/SMPS45) and triple-phase (SMPS123/SMPS457) topologies - all synchronized to an external clock (1.7–2.7 MHz) or internal 2.2-MHz fallback source.
Control is enabled through two dedicated interfaces: one I²C port reserved exclusively for digital voltage scaling (DVS), and a second general-purpose I²C or SPI interface for resource configuration and monitoring. The device integrates thermal shutdown, high-temperature warning, and per-rail power-good indication with overcurrent detection across all SMPS except the 1-A variants.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| SMPS Output Current | Up to 6 A (SMPS12), 4 A (SMPS45), 3 A (SMPS3), 2 A (SMPS6/SMPS7), 1 A (SMPS8/SMPS9); enables scalable rail design for processor cores and memory subsystems. |
| Output Voltage Range | 0.7–1.65 V (core rails), 0.7–3.3 V (I/O/pre-regulation); 10-mV or 20-mV steps support fine-grained DVS for dynamic power optimization. |
| LDO Count & Output | Seven external LDOs: two 300 mA, two 200 mA, one 100 mA (USB), one 100 mA low-noise (≤50 mA), one 50 mA; supports noise-sensitive analog/peripheral supplies. |
| Sequencing Control | OTP-programmable power-up/down and SLEEP↔ACTIVE transitions; allows deterministic, repeatable boot and state-change behavior without host intervention. |
| ADC Resolution | 12-bit sigma-delta GPADC with three external input channels and six internal self-monitoring channels; enables real-time die temperature, VSYS, and SMPS current measurement. |
| Package | 169-pin nFBGA (ZWS), 12 mm × 12 mm, 0.8-mm pitch; optimized for high-density industrial SoM layouts with thermal vias and ground plane integration. |
| Quiescent Current | 15 µA in Eco-mode™ (with hardware/software enable); extends battery-backed operation during deep-sleep states in HMI and PLC edge nodes. |
Pinout & Package
TPS6590379ZWST is housed in a 12 mm × 12 mm, 169-ball nFBGA (ZWS package) with 0.8-mm ball pitch. The package supports thermal dissipation via substrate ground (PBKG) balls and includes dedicated analog/digital/power ground domains (GND_ANA, GND_DIG, SMPSx_GND).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SMPS1_2_FDBK | Feedback Input | Differential voltage sense for dual-phase SMPS12 and SMPS45; enables accurate regulation under load transients and phase imbalance. |
| SYNCDCDC | Sync Input | Accepts external clock (1.7–2.7 MHz) to synchronize all SMPS switching; eliminates beat frequencies and reduces EMI in multi-rail systems. |
| REGEN1 / REGEN2 | Regulator Enable Output | Dedicated digital outputs controllable via OTP sequencing; used to enable external PMICs or discrete FETs in cascaded power trees. |
| I2C2_SDA_SDO / I2C2_SCL_SCE | DVS Interface | Isolated I²C bus for real-time voltage scaling commands; prevents interference with main system I²C traffic during critical DVS events. |
| POWERGOOD | Status Output | Open-drain signal indicating valid output voltages across all SMPS and LDOs; used as reset release or sequencer trigger in host processors. |
| NSLEEP / PWRDOWN | Power State Input | Asynchronous inputs initiating low-power state transitions; support fast entry into SLEEP mode with minimal latency and configurable wake sources. |
Key Features
| Feature | Design Value |
|---|---|
| Dual/Triple-Phase SMPS | SMPS12 + SMPS45 combine into 9-A triple-phase regulator with DVS control and differential remote sensing for high-current core rails. |
| OTP Power Sequencing | One-time programmable startup/shutdown and SLEEP↔ACTIVE sequences eliminate firmware dependency and ensure deterministic boot timing. |
| Eco-mode™ Operation | Hardware- or software-enabled low-power mode achieving 15 µA IQ; sustains RTC and critical LDOs while disabling non-essential SMPS rails. |
| Integrated Clock Sources | 16-MHz crystal oscillator + 32-kHz RC oscillator with buffered 32-kHz output; enables rapid system wake-up and autonomous RTC operation without external crystals. |
| Thermal Monitoring | On-die temperature sensor with high-temp warning and thermal shutdown (125°C typical); protects against sustained overload in enclosed industrial enclosures. |
| GPADC Self-Monitoring | 12-bit sigma-delta ADC measures internal die temperature, VSYS, and SMPS output currents (except 1-A LDOs); supports closed-loop thermal and power budgeting. |
Applications
| Factory Automation Controller | Programmable Logic Controller (PLC) |
|---|---|
Use Scenario: Compact DIN-rail mounted controller managing I/O expansion, motion control, and fieldbus communication. IC Role / Device Role / Timing Role: Central PMU supplying configurable core (1.1 V @ 6 A), I/O (3.3 V @ 3 A), USB (5 V via LDOUSB), and RTC (1.8 V) rails with OTP-locked sequencing. Use Value: Eliminates discrete DC-DCs and sequencing ICs; reduces BOM count by 12+ components while enabling firmware-independent safe power-up after brownout recovery. | Use Scenario: Ruggedized PLC CPU module operating in wide ambient temperatures (-40°C to +85°C) with deterministic watchdog and reset behavior. IC Role / Device Role / Timing Role: Power orchestrator delivering 1.2 V @ 4 A (SMPS45), 3.3 V @ 2 A (SMPS7), 2.5 V @ 300 mA (LDO1), and 1.8 V @ 100 mA (LDOLN) with thermal shutdown and POWERGOOD assertion. Use Value: Integrated thermal monitoring and OTP sequencing ensure reliable restart after overtemperature events without host MCU involvement. |
| System-on-Module (SoM) | Human-Machine Interface (HMI) |
Use Scenario: High-density ARM-based SoM integrating processor, DDR3L, eMMC, and Gigabit Ethernet PHY in <25 mm² footprint. IC Role / Device Role / Timing Role: Single-chip PMU generating 0.95 V @ 6 A (dual-phase SMPS12), 1.35 V @ 3 A (SMPS3), 3.3 V @ 2 A (SMPS6), and 1.8 V @ 100 mA (LDOLN) with synchronized switching. Use Value: Phase synchronization reduces input capacitance requirements by 40% and lowers conducted EMI, easing compliance with CISPR 22 Class B limits. | Use Scenario: Touchscreen HMI panel with backlight LED driver, audio codec, and capacitive touch controller requiring ultra-low standby power. IC Role / Device Role / Timing Role: Power manager supplying 1.1 V @ 4 A (SMPS45), 3.3 V @ 1 A (SMPS8), 1.8 V @ 100 mA (LDOLN), and 5 V @ 100 mA (LDOUSB) with Eco-mode™ active during display-off periods. Use Value: 15 µA quiescent current in Eco-mode extends battery backup runtime to >72 hours while maintaining RTC alarm wake capability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65912ZQW | 6-channel SMPS (max 4 A), 6 LDOs, no triple-phase support, lacks GPADC and RTC; 128-ball nFBGA (10 mm × 10 mm). | Suitable for lower-complexity SoCs without multi-phase core rail requirements or analog monitoring needs. | Select when board space is constrained and thermal monitoring/GPADC are not required. |
| TPS659413ZWT | 8 SMPS (max 6 A), 8 LDOs, integrated CAN transceiver, enhanced safety features (ASIL-B ready), larger 196-ball nFBGA (13 mm × 13 mm). | Targeted at automotive ADAS and industrial functional-safety applications requiring diagnostic coverage and fault reporting. | Choose for ISO 26262-compliant designs where safety mechanisms and CAN interface are mandatory. |
Compared with TPS65912ZQW, the TPS6590379ZWST adds triple-phase capability, GPADC, RTC, and OTP sequencing-critical for industrial SoMs needing deterministic boot and thermal awareness. Against TPS659413ZWT, it trades automotive safety features and CAN for smaller footprint and lower cost in non-safety-critical factory automation.
Availability
TPS6590379ZWST is available at Aetrix Electronics and suitable for factory automation controllers, programmable logic controllers, and system-on-module designs requiring stable component supply, long-term lifecycle support, and traceable sourcing for industrial deployments.
Supply support for TPS6590379ZWST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of industrial-grade reliability validation.
The TPS6590xx family is designed specifically for high-performance, multi-rail processor power in industrial and embedded applications-emphasizing configurability, thermal resilience, and firmware-independent sequencing.
FAQ
What is the maximum output current capability of the TPS6590379ZWST's highest-current SMPS regulator?
The TPS6590379ZWST's highest-current SMPS regulator is SMPS12, rated for 6 A continuous output. When combined with SMPS45 (4 A) in triple-phase configuration, the resulting SMPS123 delivers up to 9 A total output current with digital voltage scaling control and differential remote sensing for improved regulation accuracy under dynamic loads.
Does the TPS6590379ZWST support external clock synchronization for its SMPS regulators?
Yes, the TPS6590379ZWST supports external clock synchronization via the SYNCDCDC pin. It accepts an external clock signal between 1.7 MHz and 2.7 MHz to synchronize all SMPS regulators, reducing beat frequencies and system-level EMI. An internal fallback clock at 2.2 MHz ensures continued operation if the external clock is lost.
How many LDO regulators does the TPS6590379ZWST integrate, and what are their key specifications?
The TPS6590379ZWST integrates seven external-use LDO regulators: two 300 mA (LDO1/LDO2), two 200 mA (LDO3/LDO4), one 100 mA USB LDO (LDOUSB), one 100 mA low-noise LDO (LDOLN, specified ≤50 mA for low-noise performance), and one 50 mA LDO (LDO9). All support 0.9–3.3 V output with 50-mV steps and include short-circuit protection.
Can the TPS6590379ZWST operate without external firmware control for power sequencing?
Yes, the TPS6590379ZWST supports fully autonomous power sequencing using one-time-programmable (OTP) registers. Power-up, power-down, and SLEEP↔ACTIVE transition sequences are stored in OTP memory and executed independently of host firmware, ensuring deterministic, repeatable behavior even during cold starts or recovery from brownout conditions.
What thermal protection features are implemented in the TPS6590379ZWST?
The TPS6590379ZWST includes on-die thermal monitoring with high-temperature warning and thermal shutdown (typically 125°C). It also integrates a 12-bit sigma-delta GPADC that measures internal die temperature using an internal channel, enabling host software to implement predictive thermal throttling before shutdown thresholds are reached.
TPS6590379ZWST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 169-LFBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Processor
- Current - Supply:
- -
- Voltage - Supply:
- 3.135 ~ 5.25V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 169-NFBGA (12x12)
TPS6590379ZWST FAQ
1.How can I place an order for TPS6590379ZWST through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS6590379ZWST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS6590379ZWST reliable?
The price and inventory of TPS6590379ZWST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS6590379ZWST is usually 5 days.
3.What payment methods are accepted for TPS6590379ZWST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS6590379ZWST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS6590379ZWST?
TPS6590379ZWST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS6590379ZWST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS6590379ZWST?
For technical support, including TPS6590379ZWST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS6590379ZWST requirements.
6.How does Aetrix verify that TPS6590379ZWST is sourced from the original manufacturer or authorized distributors?
All TPS6590379ZWST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS6590379ZWST meets industry standards.
7.What is the process for return or replacement of TPS6590379ZWST?
All TPS6590379ZWST units undergo pre-shipment inspection (PSI). If there is an issue with TPS6590379ZWST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS6590379ZWST part is unused and in its original packaging.
Return procedure for TPS6590379ZWST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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