Texas Instruments TPS659102A1RSLR
- Part No.:
- TPS659102A1RSLR
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 48-VFQFN Exposed Pad
- Datasheet:
-
TPS659102A1RSLR.pdf
- Description:
- IC PWR MGMT 8 LDO 48VQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TPS659102A1RSLR from Texas Instruments is an integrated power-management unit (PMU) designed for Rockchip RK29xx/RK30xx application processors. It delivers three step-down DC-DC converters (VDD1, VDD2, VIO), one step-up 5-V DC-DC converter (VDD3), eight LDOs including RTC and backup management, and dual I²C interfaces (CTL-I²C and SR-I²C) in a 48-pin QFN package. It supports SmartReflex™ Class 3 dynamic voltage scaling for dual-core processor power optimization in portable embedded systems.
For engineers reviewing the TPS659102A1RSLR datasheet, TPS659102A1RSLR pinout, TPS659102A1RSLR application, or TPS659102A1RSLR equivalent, key selection criteria include its 48-QFN (6 mm × 6 mm) thermal pad package, triple SMPS architecture with programmable output voltages, RTC with 32.768-kHz crystal support, and dual I²C control for independent power rail sequencing and SmartReflex coordination.
Technical Context
The TPS659102A1RSLR integrates an embedded power controller (EPC) that manages boot-up, sleep/wake, and power-down sequencing for OMAP- and Rockchip-based platforms. Its dual I²C interfaces separate general-purpose control (CTL-I²C) from SmartReflex Class 3 commands (SR-I²C), enabling real-time voltage scaling of VDD1 and VDD2 based on processor load states without CPU intervention.
It features a dedicated 32.768-kHz RTC oscillator with crystal input (OSC32KIN/OUT), alarm capability, calendar/timekeeping, and backup battery management via VBACKUP. Thermal shutdown protection activates at 125°C junction temperature, and all SMPS outputs support external synchronization to a 3-MHz clock for EMI reduction.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Package | 48-pin QFN (RSL), 6.0 mm × 6.0 mm with exposed thermal pad |
| VDD1/VDD2 SMPS Output Range | 0.5625 V to 1.5375 V in 12.5-mV steps - enables precise core voltage tuning for Rockchip processors |
| VIO SMPS Output Range | 0.5625 V to 1.5375 V - powers I/O and memory subsystems with independent regulation |
| VDD3 Boost Output | 5.0 V ±3% - supplies USB PHY, camera modules, or other 5-V peripherals |
| RTC Accuracy | ±20 ppm crystal tolerance + oscillator drift ≤ ±0.5 ppm/°C - ensures reliable timekeeping across –40°C to 85°C |
| I²C Speed | Up to 400 kHz (fast-mode) on both CTL-I²C and SR-I²C - supports concurrent register access and SmartReflex command streaming |
| Thermal Shutdown Threshold | 125°C junction temperature - protects device during sustained high-load operation |
Pinout & Package
TPS659102A1RSLR uses a 48-pin QFN (RSL) package with 0.4-mm pitch and an exposed thermal pad (AGND). Pin functions are validated per TI SWCS046U datasheet Section 4.1 and Figure 4-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDIO | Digital I/O supply | Provides 1.65–3.45 V bias for all digital interface pins (I²C, GPIO, control signals) |
| SDA_SDI / SCL_SCK | CTL-I²C bidirectional data/clock | Primary control interface for register configuration, status readback, and power state management |
| SDASR_EN2 / SCLSR_EN1 | SR-I²C bidirectional data/clock | Dedicated SmartReflex Class 3 interface for real-time VDD1/VDD2 voltage scaling commands |
| SLEEP | Active-low sleep enable | Asserting low initiates hardware-controlled transition to low-power sleep mode with sequenced rail shutdown |
| GPIO_CKSYNC | Configurable GPIO / sync clock input | Can source 3-MHz synchronization signal to align SMPS switching frequencies and reduce EMI |
| VFB1 / VFB2 / VFBIO / VFB3 | SMPS feedback inputs | Analog inputs for closed-loop regulation of VDD1, VDD2, VIO, and VDD3 outputs |
| OSC32KIN / OSC32KOUT | 32.768-kHz crystal interface | Connects to external crystal for RTC timing; supports internal RC oscillator fallback |
| VBACKUP | Backup battery input | Accepts 5–15 mF supercapacitor or coin cell to maintain RTC and backup registers during main power loss |
Key Features
| Feature | Design Value |
|---|---|
| Triple SMPS + Boost + 8 LDOs | Enables full power delivery for Rockchip SoCs - VDD1/VDD2 for dual cores, VIO for I/O/memory, VDD3 for 5-V peripherals, and LDOs for PLL, DAC, DDR, and auxiliary rails |
| Dual Independent I²C Interfaces | Separates system-level control (CTL-I²C) from processor-coordinated DVFS (SR-I²C), eliminating bus contention and enabling parallel command execution |
| Embedded Power Controller (EPC) | Hardware-managed power sequencing eliminates software dependency for boot, sleep, and reset transitions - critical for deterministic startup in embedded Linux systems |
| RTC with Calendar & Alarm | Full BCD-coded date/time/calendar with interrupt-driven alarm - supports wake-on-alarm functionality without host CPU involvement |
| SmartReflex™ Class 3 Compliance | Supports real-time voltage scaling of VDD1/VDD2 based on processor performance state (P-state), reducing dynamic power by up to 30% under variable workloads |
Applications
| Smartphone Baseband Power | Industrial HMI Panel |
|---|---|
Use Scenario: Power management for Rockchip RK3066/RK3188-based smartphone reference designs with dual ARM Cortex-A9 cores, DDR3 memory, and multi-camera support. IC Role / Device Role / Timing Role: Central PMU providing sequenced core, I/O, memory, and peripheral rail generation; RTC maintains time during deep-sleep modes. Use Value: Reduces bill-of-materials by integrating 12 power rails into single IC; SmartReflex lowers active power consumption during video playback and UI rendering. | Use Scenario: Power solution for fanless industrial HMIs using RK3288 SoC, requiring wide temperature operation (–40°C to 85°C) and long-term RTC reliability. IC Role / Device Role / Timing Role: Primary power controller managing cold-start sequencing, brown-out recovery, and backup power hold-up for RTC and critical registers. Use Value: Eliminates need for discrete supervisors and backup capacitors; integrated thermal shutdown prevents field failures in enclosed enclosures. |
| Tablet Reference Design | Automotive Infotainment Gateway |
Use Scenario: Power architecture for 7-inch Android tablets with RK3368, supporting USB OTG, HDMI, and eMMC storage. IC Role / Device Role / Timing Role: Supplies VDD1/VDD2 (cores), VIO (I/O), VDD3 (USB 5-V), VAUX33 (eMMC), and VMMC (SD card) with coordinated enable/disable timing. Use Value: Enables fast boot (<500 ms) via hardware EPC sequencing; dual I²C allows simultaneous OS power management and firmware-based DVFS tuning. | Use Scenario: Secondary domain controller in automotive infotainment gateways using RK3399, requiring ASIL-B-aware power supervision and fail-safe reset behavior. IC Role / Device Role / Timing Role: Manages isolated power domains for display, audio, and CAN interface subsystems; NRESPWRON provides hardware reset assertion on power failure. Use Value: Integrated PWRHOLD and NRESPWRON pins simplify reset logic design; RTC alarm supports periodic wake-for-diagnostic functionality. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar power-management applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65910A1RSLR | Optimized for TI AM335x/OMAP-L138/DM3730 processors; different default boot sequence and register map | Targeted at TI Sitara and legacy OMAP platforms, not Rockchip compatibility | Select only for TI processor designs; incompatible register initialization for RK30xx boot ROM |
| RT8070ZSP | Single-chip PMU with 3 buck + 4 LDOs; no RTC, no SmartReflex, no dual I²C; 32-pin QFN | Lacks RTC, backup management, and processor-specific sequencing - suitable for simpler MCU-based systems | Choose when RTC and SmartReflex are unnecessary; requires external RTC and additional LDOs for full Rockchip support |
Compared with TPS65910A1RSLR and RT8070ZSP, the TPS659102A1RSLR uniquely combines Rockchip-specific boot configuration, dual I²C isolation, integrated RTC with backup, and SmartReflex Class 3 compliance - making it the only drop-in PMU for RK29xx/RK30xx production designs requiring full power autonomy.
Availability
TPS659102A1RSLR is available at Aetrix Electronics and suitable for smartphone baseband power, industrial HMI panels, tablet reference designs, and automotive infotainment gateways requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for TPS659102A1RSLR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, delivering analog and embedded processing solutions for industrial, automotive, personal electronics, and communications markets.
The TPS65910x family is a series of highly integrated power-management units designed specifically for application processors from Rockchip, TI, Samsung, and Freescale, with emphasis on boot sequencing, SmartReflex DVFS, and RTC-backed system supervision.
FAQ
What is the primary processor compatibility of the TPS659102A1RSLR?
The TPS659102A1RSLR is explicitly designed for Rockchip RK29xx and RK30xx application processors, as confirmed in TI's SWCS046U datasheet Table 3-1. It supports Rockchip-specific boot sequences, register defaults, and power rail assignments required for successful initialization and runtime operation of those SoCs.
Does the TPS659102A1RSLR include an integrated real-time clock (RTC)?
Yes, the TPS659102A1RSLR includes a fully featured RTC with 32.768-kHz crystal oscillator support (OSC32KIN/OUT), calendar/time/date tracking, alarm interrupt capability, and backup register retention. It operates from VRTC (LDO) and maintains time during main power loss when VBACKUP is connected.
How does the TPS659102A1RSLR support SmartReflex™ dynamic voltage scaling?
The TPS659102A1RSLR implements SmartReflex™ Class 3 via its dedicated SR-I²C interface (SDASR_EN2/SCLSR_EN1), allowing the Rockchip processor to dynamically adjust VDD1 and VDD2 output voltages in real time based on workload. This reduces dynamic power consumption without software overhead or CPU intervention.
What package type and thermal characteristics does the TPS659102A1RSLR use?
The TPS659102A1RSLR uses a 48-pin QFN (RSL) package measuring 6.0 mm × 6.0 mm with 0.4-mm pitch and an exposed thermal pad. Its thermal resistance is RΘJA = 37°C/W (still air), RΘJC = 16.4°C/W (top), and RΘJB = 5.6°C/W - enabling reliable operation up to 125°C junction temperature.
Can the TPS659102A1RSLR be used with non-Rockchip processors like TI AM335x?
No - the TPS659102A1RSLR is not compatible with TI AM335x processors. That function is served by the TPS65910A1RSLR variant. The "2" in TPS659102A1RSLR denotes Rockchip-specific configuration, including boot register defaults, power-up timing, and I²C address mapping optimized for RK29xx/RK30xx boot ROM requirements.
TPS659102A1RSLR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 48-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Handheld/Mobile Devices, OMAP™
- Current - Supply:
- -
- Voltage - Supply:
- 1.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-VQFN (6x6)
TPS659102A1RSLR FAQ
1.How can I place an order for TPS659102A1RSLR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS659102A1RSLR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS659102A1RSLR reliable?
The price and inventory of TPS659102A1RSLR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS659102A1RSLR is usually 5 days.
3.What payment methods are accepted for TPS659102A1RSLR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPS659102A1RSLR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPS659102A1RSLR?
TPS659102A1RSLR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS659102A1RSLR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS659102A1RSLR?
For technical support, including TPS659102A1RSLR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS659102A1RSLR requirements.
6.How does Aetrix verify that TPS659102A1RSLR is sourced from the original manufacturer or authorized distributors?
All TPS659102A1RSLR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS659102A1RSLR meets industry standards.
7.What is the process for return or replacement of TPS659102A1RSLR?
All TPS659102A1RSLR units undergo pre-shipment inspection (PSI). If there is an issue with TPS659102A1RSLR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS659102A1RSLR part is unused and in its original packaging.
Return procedure for TPS659102A1RSLR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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