Texas Instruments TPS659114A2NMAR
- Part No.:
- TPS659114A2NMAR
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 98-VFBGA
- Datasheet:
-
TPS659114A2NMAR.pdf
- Description:
- INTEGRATED POWER MANAGEMENT IC (
- Quantity:
- Payment:

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Product details
Overview
TPS659114A2NMAR from Texas Instruments is an integrated power management IC (PMIC) designed for single-cell Li-Ion, 3-cell Ni-MH, or 5-V input systems requiring multiple regulated rails. It integrates three DC-DC converters (VDD1: 1.5 A, VDD2: 1.5 A, VIO: 1.3 A), eight programmable LDOs (LDO1–LDO8), embedded power controller with EEPROM, RTC with 32.768-kHz crystal support, and nine GPIOs - deployed in portable handheld systems with dual-core processors.
For engineers reviewing the TPS659114A2NMAR datasheet, TPS659114A2NMAR pinout, TPS659114A2NMAR application, or TPS659114A2NMAR equivalent, this page delivers verified specifications, validated BGA-98 pin mapping, confirmed dynamic voltage scaling (DVS) capability for VDD1/VDD2, real-time clock integration with alarm/calendar, and I²C-controlled LDO voltage programming across 50-mV and 100-mV steps.
Technical Context
The TPS659114A2NMAR implements a hierarchical power architecture: two high-efficiency synchronous buck converters (VDD1/VDD2) support processor core DVS via dedicated I²C interface, while the third buck (VIO) powers I/O and memory subsystems. An external-FET controller (VDDCtrl) enables scalable high-current rail design up to 6 A.
Its embedded power controller (EPC) executes programmable sequencing using on-chip EEPROM, coordinating startup/shutdown of all 12 regulated outputs. The integrated RTC includes oscillator, calendar, alarm, and backup battery charging - all operating from VRTC LDO supplied by VCC7.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDD1 Output Current | 1.5 A max - supports dual-core CPU voltage scaling down to 0.6 V |
| VDD2 Output Current | 1.5 A max - independent core rail with dedicated DVS I²C channel |
| VIO Output Current | 1.3 A at 1.5 V / 1.2 A at 1.8 V - powers system I/O and DDR memory interfaces |
| LDO Voltage Steps | LDO1/LDO2: 50-mV steps (1.0–3.3 V); LDO3–LDO8: 100-mV steps (1.0–3.3 V) |
| RTC Accuracy | ±5 ppm with 32.768-kHz crystal - enables precise timekeeping and alarm wake-up |
| I²C Interface Speed | High-speed mode (3.4 Mbps) - enables rapid register access for real-time DVS and sequencing control |
| Package | 98-pin BGA MicroStar Junior™ (9.0 × 6.0 mm, 0.65-mm pitch) - optimized for compact portable PCB layouts |
Pinout & Package
TPS659114A2NMAR uses a 98-ball BGA MicroStar Junior™ package (9.0 mm × 6.0 mm, 0.65-mm pitch) with mixed analog/digital/power ball assignment. Thermal performance is enhanced by 11 AGND balls and dedicated GNDC/GNDIO planes.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SW1 (D1,D2,E2) | VDD1 Switch Node | Connects to external inductor and output capacitor for first core buck converter |
| SW2 (H1,H2) | VDD2 Switch Node | Connects to second core buck converter's power stage |
| SWIO (K7,K8) | VIO Switch Node | Drives I/O rail buck converter; supports 1.3 A at 1.5 V |
| VFB1 (D4) | VDD1 Feedback Input | Resistor-divider input for closed-loop regulation; 5 µA pull-down |
| VFB2 (K2) | VDD2 Feedback Input | Independent feedback path enabling separate core voltage control |
| EN1 (M7), EN2 (M6) | Dual Enable / I²C DVS Interface | Configurable as general-purpose enables or dedicated I²C clock/data for VDD1/VDD2 scaling |
| OSC32KIN (F8), OSC32KOUT (F7) | 32.768-kHz Crystal Interface | Direct connection to external tuning fork crystal for RTC oscillator |
| CLK32KOUT (F4) | 32-kHz Clock Output | Provides buffered 32.768-kHz signal to system peripherals; pull-down disabled in ACTIVE/SLEEP |
Key Features
| Feature | Design Value |
|---|---|
| Embedded Power Controller (EPC) | EEPROM-programmable sequencing engine managing all 12 power rails and GPIO states |
| Dynamic Voltage Scaling (DVS) | Dedicated I²C interface for real-time VDD1/VDD2 voltage adjustment during CPU load transitions |
| RTC with Calendar & Alarm | Fully autonomous timekeeping with date/time/alarm registers; operates from VRTC LDO during system sleep |
| GPIO Flexibility | Nine configurable GPIOs: four enable-capable for power-up sequence, two 10-mA LED drivers, two for DC-DC sync |
| Backup Battery Charging | Integrated linear charger for VBACKUP input supporting coin-cell or supercapacitor backup |
Applications
| Smartphone Baseband Power | Tablet Application Processor |
|---|---|
|
Use Scenario: Dual-core ARM Cortex-A9 application processor (e.g., Freescale i.MX6) powered from single Li-Ion cell with DDR3 memory interface. IC Role / Device Role / Timing Role: Central PMIC providing sequenced VDD1/VDD2 cores, VIO for DDR3 I/O, eight LDOs for peripherals, and RTC for suspend/resume timing. Use Value: Enables full DVS operation per core, reducing active power by >30% versus fixed-voltage solutions; EEPROM sequencing eliminates external logic. |
Use Scenario: High-resolution tablet with touch controller, display interface, and Wi-Fi/BT combo module requiring isolated, low-noise supplies. IC Role / Device Role / Timing Role: Single-chip power hub delivering clean, independently controllable rails - LDOs supply noise-sensitive analog blocks; RTC maintains system time during deep sleep. Use Value: Nine GPIOs configure enable sequencing and drive status LEDs; 32-kHz RTC output synchronizes display refresh and sensor sampling. |
| Industrial Handheld Terminal | Medical Portable Monitor |
|
Use Scenario: Ruggedized barcode scanner with cold-start requirement, thermal monitoring, and battery-backed real-time logging. IC Role / Device Role / Timing Role: Manages cold reset (HDRST), thermal shutdown (PWRDN), backup battery charging (VBACKUP), and RTC-based event timestamping. Use Value: Integrated comparators monitor VCCS for system-level fault detection; NRESPWRON asserts clean power-off reset signal. |
Use Scenario: Battery-powered patient monitor requiring FDA-compliant power integrity, long-term time accuracy, and fail-safe shutdown. IC Role / Device Role / Timing Role: Supplies critical analog front-end (AFE) from low-noise LDOs; RTC maintains clinical timestamps; watchdog ensures firmware recovery. Use Value: VRTC LDO provides stable 1.8 V ±2% for RTC during brownout; EEPROM stores calibrated sequencing parameters for auditability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS659121A2ZRCR | Same 98-pin BGA footprint; adds USB OTG support and removes RTC calendar functionality | Suitable for USB-host-centric designs where RTC alarm/calendar is unnecessary | Select when USB power delivery and host negotiation are required over time-stamped logging |
| TPS65910A3ZCR | 96-pin BGA; lacks VDDCtrl external-FET controller and one LDO (LDO8); reduced GPIO count (7 vs 9) | Targeted at lower-cost, lower-power i.MX53/i.MX6Solo systems without high-current auxiliary rails | Choose for cost-sensitive designs with simpler power tree and no need for >6-A auxiliary rail support |
Compared with TPS659114A2NMAR, TPS659121A2ZRCR trades RTC calendar for USB OTG capability in identical packaging, while TPS65910A3ZCR reduces feature set and pin count to lower BOM cost - neither offers full functional equivalence, but both serve adjacent i.MX6 power architectures.
Availability
TPS659114A2NMAR is available at Aetrix Electronics and suitable for smartphone baseband power, tablet application processor, industrial handheld terminal, medical portable monitor, and automotive infotainment head unit applications requiring stable component supply and long-term lifecycle support.
Supply support for TPS659114A2NMAR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies with over 50 years of innovation in energy-efficient electronics.
The TPS65911 family is engineered specifically for multi-rail power management in ARM-based portable systems - emphasizing programmable sequencing, dynamic voltage scaling, and integrated RTC for battery-constrained applications.
FAQ
What is the primary function of the TPS659114A2NMAR in a portable system?
The TPS659114A2NMAR serves as the central power management IC for portable systems powered by single-cell Li-Ion batteries or 5-V inputs. It delivers three high-current DC-DC converters (VDD1, VDD2, VIO), eight programmable LDOs, an embedded power controller with EEPROM-based sequencing, and a full-featured RTC - all integrated into a single 98-pin BGA package. Its design enables precise voltage control, low-power sleep modes, and reliable power-up/down sequences essential for ARM-based handheld devices.
Does the TPS659114A2NMAR support dynamic voltage scaling for processor cores?
Yes, the TPS659114A2NMAR supports dynamic voltage scaling (DVS) for both VDD1 and VDD2 processor core rails. It provides a dedicated high-speed I²C interface (EN1/EN2 pins configurable as SCL/SDA) that allows real-time voltage adjustment during CPU load changes. This capability is documented in the device's electrical characteristics tables (Sections 5.14 and 5.15) and enabled via programmable registers in the embedded power controller.
How is the RTC in the TPS659114A2NMAR powered and what functions does it include?
The RTC in the TPS659114A2NMAR is powered by the internal VRTC LDO, which draws from the VCC7 supply and remains active during system sleep. It includes a 32.768-kHz crystal oscillator (with OSC32KIN/OSC32KOUT pins), full calendar/date/time tracking, alarm interrupt generation, and automatic backup battery charging via the VBACKUP input. These functions are fully operational even when main system power is off, ensuring continuous timekeeping.
What package type and pin count does the TPS659114A2NMAR use?
The TPS659114A2NMAR uses a 98-pin BGA MicroStar Junior™ package with nominal dimensions of 9.0 mm × 6.0 mm and a 0.65-mm ball pitch. This package is explicitly listed in TI's Device Information table (Section 1.4) and confirmed in the Pin Configuration and Functions section (Figures 4-1 and 4-2). Ball assignments include 11 AGND connections, dedicated GNDC/GNDIO planes, and thermal-enhancing ground ball placement.
Can the TPS659114A2NMAR be used with Freescale i.MX6 processors?
Yes, the TPS659114A2NMAR is explicitly qualified for Freescale i.MX6 processors, as confirmed in the Device Comparison Table (Section 3) where "TPS659114" is listed under DDR3 memory support with "Freescale i.MX6" as the target processor. Its VDD1/VDD2 DVS capability, VIO rail for DDR3 I/O, and programmable sequencing align directly with i.MX6 power requirements, including cold boot, thermal reset (PWRDN), and sleep/wake coordination.
TPS659114A2NMAR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 98-VFBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Portable Equipment
- Current - Supply:
- 320µA
- Voltage - Supply:
- 1.7V, 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 98-NFBGA (9x6)
TPS659114A2NMAR FAQ
1.How can I place an order for TPS659114A2NMAR through Aetrix?
Please submit a Request for Quotation (RFQ) for TPS659114A2NMAR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPS659114A2NMAR reliable?
The price and inventory of TPS659114A2NMAR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPS659114A2NMAR is usually 5 days.
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4.How is shipping managed for TPS659114A2NMAR?
TPS659114A2NMAR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPS659114A2NMAR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPS659114A2NMAR?
For technical support, including TPS659114A2NMAR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPS659114A2NMAR requirements.
6.How does Aetrix verify that TPS659114A2NMAR is sourced from the original manufacturer or authorized distributors?
All TPS659114A2NMAR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPS659114A2NMAR meets industry standards.
7.What is the process for return or replacement of TPS659114A2NMAR?
All TPS659114A2NMAR units undergo pre-shipment inspection (PSI). If there is an issue with TPS659114A2NMAR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPS659114A2NMAR part is unused and in its original packaging.
Return procedure for TPS659114A2NMAR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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