Vishay General Semiconductor - Diodes Division TPSMA9.1AHE3/61T
- Part No.:
- TPSMA9.1AHE3/61T
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- DO-214AC, SMA
- Datasheet:
-
TPSMA9.1AHE3/61T.pdf
- Description:
- TVS DIODE 7.78VWM 13VC DO214AC
- Quantity:
- Payment:

- Shipping:

Inventory:6,404
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Product details
Overview
TPSMA9.1AHE3/61T from Vishay General Semiconductor is a unidirectional surface-mount transient voltage suppressor (TVS) diode in SMA (DO-214AC) package, designed for clamping voltage transients on power and signal lines. It features a 9.1 V nominal breakdown voltage (VBR), 7.78 V stand-off voltage (VWM), 29.9 V maximum clamping voltage at 50 A peak pulse current, 400 W peak pulse power (10/1000 µs), and operates up to +185 °C junction temperature - used in automotive sensor protection and industrial I/O interface surge suppression.
For engineers reviewing the TPSMA9.1AHE3/61T datasheet, TPSMA9.1AHE3/61T pinout, TPSMA9.1AHE3/61T application, or TPSMA9.1AHE3/61T equivalent, key selection criteria include unidirectional polarity, AEC-Q101 qualification status, clamping performance under 10/1000 µs surge, thermal derating above 25 °C, and compatibility with standard SMA PCB pad layouts per JESD22-B102 solderability requirements.
Technical Context
This TVS diode uses passivated anisotropic rectifier technology optimized for high-temperature stability and low incremental surge resistance. Its unidirectional structure provides forward conduction only during reverse overvoltage events, enabling precise clamping without interfering with normal DC bias paths.
The device delivers 400 W peak pulse power with 0.01 % duty cycle at TA = 25 °C, and maintains reliable operation across -65 °C to +185 °C junction temperature range. Clamping voltage is specified at 50 A IPPM, with typical VBR temperature coefficient of +0.060 %/°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VBR (min/typ/max) | 8.65 / 9.10 / 9.55 V at 1.0 mA - defines minimum voltage at which clamping initiates reliably under test conditions |
| VWM | 7.78 V - maximum continuous reverse working voltage before leakage exceeds 10 μA |
| VC @ IPPM | 29.9 V at 50 A - clamping voltage during 10/1000 µs surge, limiting downstream component stress |
| PPPM | 400 W - peak pulse power handling capability, critical for lightning and inductive switching transient immunity |
| TJ max. | +185 °C - enables use in under-hood automotive and high-ambient industrial environments |
| Polarity | Unidirectional - protects against negative-going transients only; requires correct cathode orientation in circuit |
| Package | SMA (DO-214AC) - industry-standard surface-mount outline with 0.208" x 0.157" footprint and MSL Level 1 rating |
Pinout & Package
SMA (DO-214AC) package with molded epoxy body, matte tin-plated leads, and cathode band marking. Compliant with UL 94 V-0 flammability rating and J-STD-002/JESD 22-B102 solderability standards.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Cathode (banded end) | Transient clamp output node | Connected to protected line; conducts during overvoltage to shunt energy to ground |
| Anode | Reference/return path | Typically tied to system ground or low-impedance return; completes clamping current path |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q101 qualified | Validated for automotive-grade reliability including temperature cycling, HTRB, and ESD per JESD22-A114 |
| Junction passivation | Reduces surface leakage and improves long-term stability under high-humidity and high-TJ conditions |
| Low incremental surge resistance | Enables tighter clamping voltage window and higher energy absorption efficiency per unit volume |
| MSL Level 1 | Reflow-compatible without dry-packaging; peak reflow temperature up to 260 °C supported |
Applications
| Automotive Sensor Protection | Industrial PLC I/O Protection |
|---|---|
Use Scenario: Protecting CAN/LIN bus transceivers and analog sensor inputs (e.g., pressure, temperature) from load dump and ISO 7637-2 pulses. IC Role / Device Role / Timing Role: Unidirectional TVS placed between signal line and chassis ground to clamp transients before reaching sensitive front-end circuitry. Use Value: Limits induced voltage to ≤29.9 V during 50 A surges, preserving signal integrity and preventing latch-up in 3.3 V/5 V interface ICs. | Use Scenario: Safeguarding digital input modules in programmable logic controllers exposed to relay coil flyback and motor drive noise. IC Role / Device Role / Timing Role: Standoff-rated TVS mounted at terminal block entry point to absorb repetitive 400 W surges without degradation. Use Value: Maintains 7.78 V working voltage margin while surviving >100,000 surge events per MIL-STD-883H Method 3015.8. |
| Consumer Power Adapter Input | Telecom Line Card Surge Suppression |
Use Scenario: Secondary-side overvoltage protection in AC/DC adapters subjected to conducted EFT and surge per IEC 61000-4-4/5. IC Role / Device Role / Timing Role: Fast-response TVS placed across DC output rails to prevent overvoltage damage to downstream regulators and USB ports. Use Value: Responds in <1 ps to clamp 1 kV/500 A surges, reducing risk of catastrophic failure in cost-sensitive consumer designs. | Use Scenario: Primary protection for Ethernet PHY interfaces and DSL line drivers in network edge equipment. IC Role / Device Role / Timing Role: First-stage TVS on RJ-45 jack side, coordinated with GDT or polymer PTC for multi-level protection architecture. Use Value: Provides 29.9 V clamping at 50 A with <0.1 Ω dynamic impedance, minimizing voltage overshoot into 100 Ω differential pairs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transient suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMBJ9.0A | Higher 9.0 V nominal VBR, same 400 W rating but SMB package (larger footprint, higher thermal mass) | Preferred where board space allows larger pads and higher thermal dissipation is needed | Select when PCB layout permits 0.236" x 0.157" footprint and thermal design requires lower steady-state RθJA |
| 1.5SMC9.0A | Same VBR and PPPM, but SMC (DO-214AB) package with 0.276" x 0.197" footprint and 1.5 kW peak rating | Used in high-energy industrial systems requiring extended surge endurance beyond 400 W | Choose when system-level testing demands >1000 W single-pulse capability and larger mounting area is available |
Compared with TPSMA9.1AHE3/61T, SMBJ9.0A offers identical clamping performance in a thermally robust SMB package, while 1.5SMC9.0A provides higher single-pulse energy headroom in SMC format - both require PCB layout revision due to different footprints and thermal pad requirements.
Availability
TPSMA9.1AHE3/61T is available at Aetrix Electronics and suitable for automotive sensor protection, industrial PLC I/O protection, and telecom line card surge suppression requiring stable component supply, AEC-Q101 compliance, and high-temperature operational continuity.
Supply support for TPSMA9.1AHE3/61T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay General Semiconductor is a global leader in discrete semiconductors, specializing in diodes, rectifiers, TVS devices, and optoelectronics with emphasis on reliability and high-temperature performance.
The TPSMA series belongs to Vishay's PAR® (Protected Anisotropic Rectifier) transient voltage suppressor family, engineered specifically for automotive and industrial applications demanding AEC-Q101 qualification, 185 °C operation, and consistent clamping under repetitive surge stress.
FAQ
What is the maximum clamping voltage of the TPSMA9.1AHE3/61T under surge conditions?
The TPSMA9.1AHE3/61T has a maximum clamping voltage (VC) of 29.9 V at 50 A peak pulse current with a 10/1000 µs waveform. This value is measured under standardized test conditions per ANSI/IEEE C62.35 and represents the upper limit of voltage seen by downstream components during transient events. The clamping performance remains stable across its full operating temperature range, making TPSMA9.1AHE3/61T suitable for high-reliability applications where voltage overshoot must be tightly constrained.
Is the TPSMA9.1AHE3/61T AEC-Q101 qualified?
Yes, the TPSMA9.1AHE3/61T is AEC-Q101 qualified. The HE3 suffix indicates RoHS-compliant construction with AEC-Q101 qualification, verified through stress tests including high-temperature reverse bias (HTRB), temperature cycling, and electrostatic discharge per JESD22-A114. This qualification confirms suitability for automotive applications such as engine control units, body electronics, and ADAS sensor interfaces where long-term reliability under thermal and electrical stress is mandatory.
What is the standoff voltage rating for the TPSMA9.1AHE3/61T?
The standoff voltage (VWM) for the TPSMA9.1AHE3/61T is 7.78 V. This is the maximum continuous reverse voltage the device can withstand without exceeding 10 μA leakage current at 25 °C. At elevated temperatures (e.g., 150 °C), leakage increases to 1000 μA, but VWM remains unchanged - ensuring stable DC blocking behavior in automotive and industrial power rail protection circuits using TPSMA9.1AHE3/61T.
Does the TPSMA9.1AHE3/61T have unidirectional or bidirectional polarity?
The TPSMA9.1AHE3/61T is unidirectional. Its electrical characteristics - including breakdown voltage specification, clamping curve, and test methodology - apply only to reverse-biased operation. The cathode band marks the terminal that must be connected toward the protected line, with the anode tied to ground or reference potential. Bidirectional variants (e.g., TPSMA9.1CA) are separate part numbers and are not interchangeable with TPSMA9.1AHE3/61T without circuit redesign.
What package type does the TPSMA9.1AHE3/61T use, and what are its key mechanical features?
The TPSMA9.1AHE3/61T uses the SMA (DO-214AC) package: a compact surface-mount outline measuring 4.93 mm × 3.99 mm with 2.54 mm lead pitch. Key mechanical features include UL 94 V-0 rated molding compound, matte tin-plated leads compliant with J-STD-002 and JESD 22-B102, MSL Level 1 moisture sensitivity, and cathode band marking for polarity identification. These attributes ensure robust manufacturability and long-term reliability in automated assembly processes using TPSMA9.1AHE3/61T.
TPSMA9.1AHE3/61T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- DO-214AC, SMA
- Series:
- PAR®
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Zener
- Unidirectional Channels:
- 1
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 7.78V
- Voltage - Breakdown (Min):
- 8.65V
- Voltage - Clamping (Max) @ Ipp:
- 13V
- Current - Peak Pulse (10/1000µs):
- 29.9A
- Power - Peak Pulse:
- 400W
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -65°C ~ 185°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DO-214AC (SMA)
TPSMA9.1AHE3/61T FAQ
1.How can I place an order for TPSMA9.1AHE3/61T through Aetrix?
Please submit a Request for Quotation (RFQ) for TPSMA9.1AHE3/61T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TPSMA9.1AHE3/61T reliable?
The price and inventory of TPSMA9.1AHE3/61T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TPSMA9.1AHE3/61T is usually 5 days.
3.What payment methods are accepted for TPSMA9.1AHE3/61T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TPSMA9.1AHE3/61T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TPSMA9.1AHE3/61T?
TPSMA9.1AHE3/61T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TPSMA9.1AHE3/61T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TPSMA9.1AHE3/61T?
For technical support, including TPSMA9.1AHE3/61T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TPSMA9.1AHE3/61T requirements.
6.How does Aetrix verify that TPSMA9.1AHE3/61T is sourced from the original manufacturer or authorized distributors?
All TPSMA9.1AHE3/61T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TPSMA9.1AHE3/61T meets industry standards.
7.What is the process for return or replacement of TPSMA9.1AHE3/61T?
All TPSMA9.1AHE3/61T units undergo pre-shipment inspection (PSI). If there is an issue with TPSMA9.1AHE3/61T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TPSMA9.1AHE3/61T part is unused and in its original packaging.
Return procedure for TPSMA9.1AHE3/61T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TPSMA9.1AHE3/61T Tags

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