Taiwan Semiconductor Corporation TSD2JFS
- Part No.:
- TSD2JFS
- Manufacturer:
- Taiwan Semiconductor Corporation
- Category:
- Single Diodes
- Package:
- SOD-128
- Datasheet:
-
TSD2JFS.pdf
- Description:
- 2A, 400V, STANDARD RECOVERY RECT
- Quantity:
- Payment:

- Shipping:

Inventory:28,000
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TSD2JFS from Taiwan Semiconductor is a 2 A, 600 V glass-passivated ESD-hardened surface-mount rectifier in SOD-128 package, featuring 40 A surge current rating, 15 °C/W junction-to-lead thermal resistance, and ≥10 kV IEC 61000-4-2 contact-mode ESD immunity-used for polarity protection in industrial power supplies and DC input stages.
For engineers reviewing the TSD2JFS datasheet, TSD2JFS pinout, TSD2JFS application, or TSD2JFS equivalent, key selection criteria include its 600 V repetitive peak reverse voltage, low 0.94 V forward voltage at 2 A/25°C, 175°C max junction temperature, SOD-128 mechanical compatibility, and AEC-Q101-001 H3B-class ESD robustness.
Technical Context
The TSD2JFS is a single-die, standard recovery silicon rectifier optimized for high-reliability DC input protection. Its glass-passivated junction ensures stable leakage performance up to 125°C (IR ≤ 5 µA), while the SOD-128 package enables high-power density mounting on 5 mm × 5 mm copper pads with RθJA = 75 °C/W.
It delivers 2 A average forward current with derating above 75°C ambient, supports 40 A non-repetitive surge (8.3 ms sine), and exhibits 15 pF junction capacitance at 4 V reverse bias-making it suitable for moderate-frequency (<1 MHz) rectification where ESD resilience and thermal stability are critical.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VRRM | 600 V - Maximum repetitive reverse blocking voltage; defines safe DC input voltage ceiling before breakdown. |
| IF | 2 A - Continuous forward current rating at 75°C ambient on standard PCB; determines steady-state power handling. |
| IFSM | 40 A - Non-repetitive surge current (8.3 ms); supports inrush current tolerance during power-up events. |
| VF @ 2 A, 25°C | 0.94 V - Forward voltage drop; directly impacts conduction loss (1.88 W at 2 A) and thermal design margin. |
| RθJL | 15 °C/W - Junction-to-lead thermal resistance; enables accurate thermal modeling when soldered to copper land patterns. |
| ESD Rating | ≥10 kV (IEC 61000-4-2 contact) - Confirmed immunity level for handling and board-level ESD events without degradation. |
| TJ max | +175°C - Maximum junction temperature; allows operation in high-ambient environments like enclosed industrial enclosures. |
Pinout & Package
SOD-128 surface-mount package with cathode-indicated band; matte tin-plated leads compliant with J-STD-002 solderability and JESD 201 Class 2 whisker resistance; UL 94V-0 molding compound; weight ≈ 0.028 g.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode | Forward current entry point | Connected to lower-potential side (e.g., ground or return path) in polarity protection configuration. |
| Cathode | Forward current exit / reverse-blocking terminal | Marked by band; connects to positive input rail; blocks reverse voltage up to 600 V. |
Key Features
| Feature | Design Value |
|---|---|
| ESD-hardened junction | Rated ≥10 kV IEC 61000-4-2 contact discharge-reduces field failure risk in automated assembly and end-use environments. |
| Glass passivation | Stabilizes reverse leakage (≤1 µA @ 25°C, ≤5 µA @ 125°C) and prevents moisture-induced parameter drift over time. |
| Low thermal resistance | RθJL = 15 °C/W enables efficient heat transfer to PCB copper, supporting 2 A continuous operation without heatsink. |
| SOD-128 footprint | JEDEC DO-221AD-compliant outline allows direct replacement of similar-rated rectifiers without layout change. |
Applications
| Industrial Power Input Protection | Automotive Body Control Module (BCM) Supply Clamp |
|---|---|
Use Scenario: DC input stage of programmable logic controller (PLC) power module exposed to reverse connection risk and ESD events during service. IC Role / Device Role / Timing Role: Polarity protection rectifier placed in series with main 24 V DC input rail. Use Value: Blocks reverse polarity up to 600 V while sustaining 2 A continuous load; ESD immunity prevents latch-up or parametric shift during field maintenance. | Use Scenario: Reverse-battery protection in 12 V automotive BCMs subjected to jump-start transients and ISO 10605 ESD exposure. IC Role / Device Role / Timing Role: Series-connected rectifier on battery feed line to prevent damage from accidental negative battery connection. Use Value: Withstands 40 A surge (8.3 ms) from jump-start pulses and maintains <1 µA leakage at 25°C to minimize standby current drain. |
| Telecom AC/DC Adapter Output Rectification | Renewable Energy Charge Controller Input Stage |
Use Scenario: Secondary-side rectification in isolated 48 V telecom adapter operating at 100 kHz switching frequency. IC Role / Device Role / Timing Role: Standard recovery rectifier converting transformer secondary AC to regulated DC output. Use Value: 15 pF junction capacitance minimizes high-frequency switching noise coupling; 0.94 V VF limits conduction loss at full load. | Use Scenario: Input rectification in solar charge controller accepting variable PV array voltages up to 500 V DC. IC Role / Device Role / Timing Role: Blocking diode preventing battery backfeed into PV string under low-light conditions. Use Value: 600 V VRRM provides 100 V safety margin above 500 V array open-circuit voltage; 175°C TJ max supports uncooled operation in outdoor enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar rectifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STPS2H100S | 2 A, 100 V Schottky; lower VF (0.55 V), no ESD rating specified | Not rated for >100 V reverse blocking; unsuitable for 600 V systems | Select only if reverse voltage ≤100 V and ESD immunity is not required. |
| SB260-E3/54 | 2 A, 60 V Schottky; VF = 0.55 V; no AEC-Q101 or IEC ESD data | Limited to low-voltage DC systems; lacks documented ESD hardening | Use only in cost-sensitive, non-automotive, sub-60 V applications where ESD robustness is secondary. |
Compared with STPS2H100S and SB260-E3/54, the TSD2JFS uniquely combines 600 V blocking, 2 A current capability, and certified ≥10 kV ESD immunity-making it the only option among the three qualified for industrial and automotive polarity protection where high-voltage resilience and electrostatic ruggedness are jointly required.
Availability
TSD2JFS is available at Aetrix Electronics and suitable for industrial power input protection, automotive body control modules, telecom adapter rectification, and renewable energy charge controllers requiring stable component supply across extended production lifecycles.
Supply support for TSD2JFS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Taiwan Semiconductor Corporation (TSC) is a vertically integrated semiconductor manufacturer specializing in discrete power devices, including rectifiers, TVS diodes, and MOSFETs, with global distribution and AEC-Q101 qualification capabilities.
The TSD2xFS series was designed specifically for high-reliability polarity protection and input-stage rectification in harsh environments-emphasizing ESD hardness, thermal robustness, and JEDEC-standard packaging for automated manufacturing.
FAQ
What is the maximum repetitive peak reverse voltage rating for the TSD2JFS?
The TSD2JFS has a maximum repetitive peak reverse voltage (VRRM) of 600 V, as confirmed in the Absolute Maximum Ratings table of the official Taiwan Semiconductor datasheet (Version A2309). This rating defines the highest continuous reverse voltage the device can block without breakdown under normal operating conditions. Exceeding this value risks irreversible junction failure. The TSD2JFS is therefore suited for applications such as 400–500 V DC input stages where a 100 V safety margin is required.
Does the TSD2JFS meet AEC-Q101 reliability standards?
Yes, the TSD2JFS meets AEC-Q101-001 Human Body Model (HBM) Class H3B (≥8 kV), as explicitly stated in the Immunity to Electrical Static Discharge section of the datasheet. This qualification confirms its suitability for automotive-grade applications requiring robustness against electrostatic discharge during handling and operation. The TSD2JFS is not just tested to AEC-Q101-it is formally rated and marked per that standard, distinguishing it from non-qualified rectifiers.
What is the forward voltage drop of the TSD2JFS at 2 A and 25°C?
The forward voltage drop (VF) of the TSD2JFS is 0.94 V maximum at 2 A forward current and 25°C junction temperature, per the Electrical Specifications table. At typical operating conditions (2 A, 25°C), VF is 0.94 V-this value directly determines conduction loss (Pcond = IF × VF ≈ 1.88 W) and must be included in thermal design calculations for PCB copper area and ambient temperature derating.
Is the TSD2JFS compatible with lead-free reflow soldering processes?
Yes, the TSD2JFS features matte tin-plated leads compliant with J-STD-002 for solderability, and its SOD-128 package is rated for lead-free reflow profiles per JEDEC J-STD-020 (Moisture Sensitivity Level 1). The device requires no pre-baking and withstands peak temperatures up to 260°C, making it fully compatible with standard Pb-free assembly lines used in industrial and automotive electronics manufacturing.
What is the junction-to-lead thermal resistance (RθJL) of the TSD2JFS?
The junction-to-lead thermal resistance (RθJL) of the TSD2JFS is 15 °C/W, as specified in the Thermal Performance table. This parameter is measured with the device mounted on a 5 mm × 5 mm copper pad test board and reflects heat transfer efficiency from die to solder joint. It enables accurate thermal modeling for applications where the device is soldered directly to large copper areas without additional heatsinking-critical for compact industrial power designs.
TSD2JFS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Taiwan Semiconductor Corporation
- Series:
- -
- Package/Case:
- SOD-128
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Technology:
- Standard
- Voltage - DC Reverse (Vr) (Max):
- 600 V
- Current - Average Rectified (Io):
- 2A
- Voltage - Forward (Vf) (Max) @ If:
- 1.1 V @ 2 A
- Speed:
- Standard Recovery >500ns, > 200mA (Io)
- Reverse Recovery Time (trr):
- -
- Current - Reverse Leakage @ Vr:
- 1 µA @ 600 V
- Capacitance @ Vr, F:
- 15pF @ 4V, 1MHz
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOD-128
- Operating Temperature - Junction:
- -40°C ~ 175°C
TSD2JFS FAQ
1.How can I place an order for TSD2JFS through Aetrix?
Please submit a Request for Quotation (RFQ) for TSD2JFS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TSD2JFS reliable?
The price and inventory of TSD2JFS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TSD2JFS is usually 5 days.
3.What payment methods are accepted for TSD2JFS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TSD2JFS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TSD2JFS?
TSD2JFS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TSD2JFS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TSD2JFS?
For technical support, including TSD2JFS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TSD2JFS requirements.
6.How does Aetrix verify that TSD2JFS is sourced from the original manufacturer or authorized distributors?
All TSD2JFS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TSD2JFS meets industry standards.
7.What is the process for return or replacement of TSD2JFS?
All TSD2JFS units undergo pre-shipment inspection (PSI). If there is an issue with TSD2JFS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TSD2JFS part is unused and in its original packaging.
Return procedure for TSD2JFS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TSD2JFS Tags

-
1N4448X-TP
Micro Commercial Co

-
1N4148WX-TP
Micro Commercial Co

-
1N4148TR
onsemi

-
MMSD4148T1G
onsemi

-
MMBD914LT3G
onsemi

-
BAS16HT1G
onsemi

-
1N914BWT
onsemi

-
BAS21LT1G
onsemi

-
LL4148
onsemi

-
BAS16LT1G
onsemi

-
MMSD914T1G
onsemi

-
BAV21W-7-F
Diodes Incorporated
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
