Texas Instruments UCC27525DGN

Overview

UCC27525DGN from Texas Instruments is a dual-channel, low-side gate driver IC with independent inverting and non-inverting inputs per channel, 5A peak source/sink drive current, 13ns typical propagation delay, and 4.5V–18V single-supply operation - used to drive MOSFETs and GaN power switches in high-frequency DC-DC converters.

For engineers reviewing the UCC27525DGN datasheet, UCC27525DGN pinout, UCC27525DGN application, or UCC27525DGN equivalent, key selection criteria include channel input logic configuration (one inverting + one non-inverting), enable-pin control per channel, thermal performance in HVSSOP-8 package, and UVLO behavior during power sequencing.

Technical Context

The UCC27525DGN implements two independent low-side driver channels with separate ENA/ENB enable inputs and distinct input logic polarities: INA is inverting, INB is non-inverting. Its internal UVLO circuit holds both outputs low until VDD exceeds 4.2V (typ), ensuring glitch-free startup.

It uses TTL/CMOS-compatible input thresholds (1.2V low / 2.1V high) with 0.9V hysteresis for noise immunity, and supports floating-input safety via internal pullup/pulldown resistors - outputs default low if INA or INB is unconnected.

Key Specifications

Pinout & Package

The UCC27525DGN is housed in an 8-pin HVSSOP (DGN) package with exposed thermal pad, measuring 3.0mm × 3.0mm - optimized for high-power density layouts and enhanced thermal dissipation in compact converters.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-side dual gate driver applications.

Compared with UCC27524DGN, UCC27525DGN provides asymmetric input logic essential for synchronous rectification control, while UCC27611DGN trades dual-channel integration for higher per-channel performance - making UCC27525DGN the best fit for space-constrained, mixed-logic gate-drive applications.

Availability

UCC27525DGN is available at Aetrix Electronics and suitable for switched-mode power supplies, DC-DC converters, and motor control systems requiring stable component supply, long-term manufacturability, and guaranteed traceable sourcing.

Supply support for UCC27525DGN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions, with over 50 years of power management innovation and broad distribution infrastructure.

The UCC2752x family was designed specifically for high-frequency, high-efficiency power conversion - targeting GaN- and SiC-based topologies where fast, robust, and thermally efficient gate driving is critical to system performance.

FAQ

What is the input logic configuration of the UCC27525DGN?

The UCC27525DGN features one inverting input (INA) and one non-inverting input (INB), enabling asymmetric gate-drive control per channel. This configuration supports use cases like synchronous rectification (inverting) paired with primary-side switching (non-inverting). The enable pins ENA and ENB are active-high and internally pulled up to VDD, allowing independent channel control. This logic arrangement is fixed and cannot be reconfigured.

Does the UCC27525DGN support parallel operation of its two output channels?

Yes, the UCC27525DGN supports paralleling OUTA and OUTB to achieve up to 10A peak drive current, enabled by its 1ns typical inter-channel delay matching and matched internal propagation paths. When paralleled, both channels must share the same input signal (applied to INA or INB depending on desired polarity) and common enable (ENA = ENB). Thermal derating and layout symmetry are required to ensure current sharing - refer to TI's SLUSAQ3H datasheet Section 8.2 for implementation guidance.

What happens to the outputs of the UCC27525DGN when the input pins are left floating?

When INA or INB is left floating, the UCC27525DGN forces the corresponding output (OUTA or OUTB) low via internal pullup (for INA) or pulldown (for INB) resistors - a built-in safety feature. This behavior prevents unintended power-switch turn-on during startup, fault conditions, or unconnected control signals. The same applies to ENA/ENB: floating enables the channel, but floating inputs disable the output. This design meets functional safety expectations for industrial and automotive gate drivers.

What is the recommended bypass capacitance for the VDD pin of the UCC27525DGN?

Texas Instruments recommends a dual-capacitor bypass network at the VDD pin of the UCC27525DGN: a 0.1µF X7R ceramic capacitor placed as close as possible to the VDD–GND pins, plus a 1µF low-ESR ceramic or tantalum capacitor in parallel. This combination maintains low impedance across 100kHz–100MHz, supplying the 5A peak currents needed for fast gate charging while suppressing supply rail noise. Layout guidelines emphasize short, wide traces and direct connection to a solid ground plane beneath the DGN package's exposed pad.

How does the UCC27525DGN behave during power-up and brown-out conditions?

The UCC27525DGN incorporates undervoltage lockout (UVLO) that holds both OUTA and OUTB low until VDD rises above 4.2V (typical), with 0.3V hysteresis to prevent oscillation near the threshold. During power-down, outputs remain low once VDD falls below ~3.9V. This ensures glitch-free operation at startup and shutdown - critical for preventing shoot-through in half-bridge configurations. The UVLO circuit is independent of input or enable states, guaranteeing predictable behavior regardless of control signal timing.