Texas Instruments UCC27525DGNR

Overview

UCC27525DGNR from Texas Instruments is a dual-channel, low-side gate driver IC with one inverting and one non-inverting input configuration, delivering 5A peak source/sink current per channel, 13ns typical propagation delay, and rail-to-rail output drive - used to control MOSFETs and GaN FETs in high-frequency power stages of DC-DC converters and motor drives.

For engineers reviewing the UCC27525DGNR datasheet, UCC27525DGNR pinout, UCC27525DGNR application, or UCC27525DGNR equivalent, key selection considerations include independent enable logic per channel, TTL/CMOS-compatible voltage-independent thresholds, 4.5–18V supply range, 1ns typical inter-channel delay matching, and operation up to 140°C junction temperature.

Technical Context

The UCC27525DGNR implements two independent low-side driver channels with separate enable inputs (ENA/ENB), where Channel A uses an inverting input (INA) and Channel B uses a non-inverting input (INB). Its internal UVLO circuit holds both outputs low until VDD exceeds 4.2V (typ), ensuring glitch-free startup and shutdown.

Input thresholds are fixed at ~2.1V (high) and ~1.2V (low) with 0.9V hysteresis, decoupled from VDD voltage, enabling direct interface with 3.3V or 5V controllers. Outputs are actively pulled low when inputs float, and internal pullup resistors on ENA/ENB support pin-to-pin compatibility with legacy UCC2732x devices.

Key Specifications

Pinout & Package

UCC27525DGNR is housed in an 8-pin HVSSOP (DGN) package with exposed thermal pad (3.00mm × 3.00mm body), optimized for high-power density and thermal performance in compact power modules.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-side dual gate driver applications.

Compared with UCC27524DR and LM5113SDX/NOPB, the UCC27525DGNR uniquely combines inverting/non-inverting channel pairing, per-channel enable, HVSSOP thermal performance, and VDD-independent thresholds - making it optimal for GaN-focused, safety-critical, or thermally constrained dual-drive applications.

Availability

UCC27525DGNR is available at Aetrix Electronics and suitable for switched-mode power supplies, motor control systems, and GaN-based solar inverters requiring stable component supply, long-term manufacturability, and guaranteed traceability.

Supply support for UCC27525DGNR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with over 50 years of innovation in high-reliability power solutions.

The UCC27525DGNR belongs to TI's UCC2752x family of high-speed low-side gate drivers, engineered specifically for efficient, robust control of wide-bandgap power devices in high-frequency, high-efficiency power conversion systems.

FAQ

What is the logic configuration of UCC27525DGNR?

The UCC27525DGNR features one inverting input (INA) for Channel A and one non-inverting input (INB) for Channel B. This asymmetric configuration allows flexible implementation of complementary drive schemes - for example, using INA to drive a low-side switch in inversion and INB to control a synchronous rectifier directly. Both channels have independent enable inputs (ENA/ENB) that default to active when floating.

Does UCC27525DGNR support GaN FETs?

Yes, UCC27525DGNR is explicitly designed for emerging wide-bandgap power devices including GaN FETs. Its 5A peak source/sink current, 7ns/6ns rise/fall times, 13ns propagation delay, and 4.5–18V supply range enable fast, low-loss gate driving at high dV/dt rates. The device's VDD-independent logic thresholds also simplify interface with GaN driver-integrated controllers operating at 3.3V or 5V.

What happens to UCC27525DGNR outputs when inputs are left floating?

When INA floats, its internal VDD pullup forces OUTA low; when INB floats, its internal GND pulldown forces OUTB low. This fail-safe behavior ensures both outputs remain OFF during signal loss, unconnected traces, or controller reset - a critical safety feature verified across –40°C to +140°C operation and required for IEC 62368-1 compliance.

Can UCC27525DGNR outputs be paralleled for higher current?

Yes, the UCC27525DGNR datasheet explicitly states that "two outputs are in parallel for higher drive current." Due to 1ns typical delay matching and matched output impedance, paralleling OUTA and OUTB yields up to 10A peak drive capability while maintaining timing integrity - ideal for driving single high-Qg SiC or GaN FETs in high-power density designs.

What is the thermal performance of the DGN package in UCC27525DGNR?

The UCC27525DGNR's HVSSOP-8 (DGN) package features an exposed thermal pad and achieves 71.8°C/W junction-to-ambient thermal resistance (RθJA) under standard JEDEC PCB conditions. With proper PCB copper pour and solder paste stencil design, it sustains continuous 5A pulsed operation at +140°C junction temperature - outperforming SOIC-8 by >45% in thermal dissipation.