Texas Instruments UCC27526DSDR

Overview

UCC27526DSDR from Texas Instruments is a dual-channel, low-side gate driver IC designed for high-frequency switching power stages. It delivers 5A peak source/sink current per channel, features dual independent input pins (IN+ and IN−) per channel for flexible inverting/non-inverting configuration, and operates across 4.5V–18V VDD with –40°C to 140°C junction temperature range-enabling robust gate drive for GaN FETs and IGBTs in DC-DC converters and motor control.

For engineers reviewing the UCC27526DSDR datasheet, UCC27526DSDR pinout, UCC27526DSDR application, or UCC27526DSDR equivalent, key selection criteria include its WSON-8 (DSD) package, 13ns typical propagation delay, 1ns typical inter-channel delay matching, rail-to-rail output swing, and UVLO-protected glitch-free startup behavior.

Technical Context

The UCC27526DSDR implements a dual-input architecture per channel (INA+/INA−, INB+/INB−), enabling user-selectable inverting or non-inverting operation without external logic. Each channel's output state is determined only when one input is actively driven and the complementary input is properly biased-either to GND (for INx− in non-inverting mode) or VDD (for INx+ in inverting mode).

Its internal UVLO circuit holds both outputs low until VDD exceeds 4.2V (typ), with 300mV hysteresis, ensuring clean power-up/power-down sequencing. Input thresholds (VIN_H = 2.1V typ, VIN_L = 1.2V typ) and enable thresholds (VEN_H = 2.1V typ) are supply-independent and feature 0.9V typical hysteresis for noise immunity in noisy power-conversion environments.

Key Specifications

Pinout & Package

UCC27526DSDR is housed in a thermally enhanced 3mm × 3mm WSON-8 (DSD) package with exposed thermal pad, optimized for high-power-density PCB layouts and efficient heat dissipation (RθJA = 46.7°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-side gate driver applications.

Compared with UCC27525DSDR and LM5113SDX/NOPB, the UCC27526DSDR uniquely provides per-channel dual-input logic selection in the compact WSON-8 package-enabling firmware-reconfigurable gate drive polarity without hardware changes or additional components.

Availability

UCC27526DSDR is available at Aetrix Electronics and suitable for switched-mode power supplies, GaN-based DC-DC converters, and industrial motor control systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for UCC27526DSDR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with leadership in power management, signal chain, and high-reliability ICs.

The UCC27526DSDR belongs to TI's UCC2752x family of high-speed low-side gate drivers, engineered specifically for emerging wide-bandgap power devices-including GaN and SiC-where fast, robust, and configurable gate drive is essential.

FAQ

What is the function of the INA− and INA+ pins on the UCC27526DSDR?

The UCC27526DSDR uses dual-input architecture per channel: INA+ serves as the non-inverting input and INA− as the inverting input for Channel A. To activate non-inverting operation, apply the PWM signal to INA+ and tie INA− to GND; for inverting operation, apply PWM to INA− and tie INA+ to VDD. Both pins must be actively biased-neither may float-as the UCC27526DSDR forces OUTA low if either input is unconnected.

Does the UCC27526DSDR support parallel operation of its two output channels?

Yes, the UCC27526DSDR supports paralleling OUTA and OUTB due to its 1ns typical inter-channel delay matching and identical electrical characteristics. When combined, they deliver up to 10A peak source/sink current to drive a single high-capacitance gate. The UCC27526DSDR's matched propagation delays prevent timing skew that could cause shoot-through or uneven current sharing.

What is the recommended bypass capacitor configuration for the VDD pin of the UCC27526DSDR?

Texas Instruments specifies two capacitors for UCC27526DSDR VDD bypassing: a 0.1µF X7R ceramic capacitor placed as close as possible to the VDD–GND pins, plus a 1µF low-ESR ceramic capacitor in parallel. This dual-capacitor network maintains low impedance across high-frequency switching transients (up to several MHz), ensuring stable gate drive performance and minimizing supply-induced jitter in the UCC27526DSDR.

How does the UCC27526DSDR behave during power-up when VDD is below UVLO threshold?

During power-up, the UCC27526DSDR holds both OUTA and OUTB low until VDD rises above the UVLO turn-on threshold of 4.2V (typical). This behavior persists regardless of input states or enable conditions, ensuring glitch-free startup. Once VDD exceeds the threshold, outputs respond to valid input signals-only after both INA+ and INA− (or INB+ and INB−) are correctly biased per the selected logic mode does the UCC27526DSDR begin normal operation.

Is the UCC27526DSDR pin-compatible with other members of the UCC2752x family?

No, the UCC27526DSDR is not pin-compatible with UCC27523DSDR or UCC27525DSDR. While all three share the WSON-8 (DSD) package footprint, their pin functions differ significantly: UCC27526DSDR uses INA+/INA−/INB+/INB− on pins 1,2,7,8, whereas UCC27523/27525 use ENA/INA/INB/ENB on those positions. Direct substitution would result in incorrect logic behavior or non-functional outputs.