Texas Instruments UCC27526DSDT
- Part No.:
- UCC27526DSDT
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 8-WDFN Exposed Pad
- Datasheet:
-
UCC27526DSDT.pdf
- Description:
- IC GATE DRVR LOW-SIDE 8SON
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
UCC27526DSDT from Texas Instruments is a dual-channel, low-side gate driver IC designed to drive MOSFETs and IGBTs in high-frequency power stages. It delivers 5A peak source/sink current per channel, features 13ns typical propagation delay and 1ns typical inter-channel delay matching, and operates across 4.5V–18V supply with –40°C to 140°C junction temperature range - enabling robust GaN-based DC-DC converter and motor control designs.
For engineers reviewing the UCC27526DSDT datasheet, UCC27526DSDT pinout, UCC27526DSDT application, or UCC27526DSDT equivalent, key selection considerations include its dual-input per-channel architecture (INA+/INA−, INB+/INB−), WSON-8 package with exposed thermal pad, UVLO-protected glitch-free startup, and independent logic-level flexibility for inverting/non-inverting configurations without external level-shifting.
Technical Context
The UCC27526DSDT implements a dual-input per-channel architecture where each output is controlled by complementary input pairs (INA+/INA−, INB+/INB−), allowing user-selectable inverting or non-inverting operation per channel. Its internal UVLO circuit holds outputs low until VDD exceeds 4.2V (typ), with 300mV hysteresis to prevent chatter during brownout conditions.
Input thresholds are TTL/CMOS-compatible (VIN_H = 2.1V typ, VIN_L = 1.2V typ) and fully independent of VDD voltage, while internal pullup/pulldown resistors ensure outputs remain low when any input floats - a safety-critical feature verified across –40°C to 140°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Peak drive current | ±5A per channel - sufficient to rapidly charge/discharge high-Qg GaN FETs and IGBTs at >1 MHz switching frequencies. |
| Propagation delay | 13ns typical - enables precise timing control in synchronous rectifiers and phase-shifted topologies. |
| Delay matching | 1ns typical between channels - supports paralleling outputs or driving dual switches with minimal skew-induced shoot-through risk. |
| Supply range | 4.5V–18V - compatible with 5V, 12V, and 15V bias rails; supports direct interface with GaN drivers requiring low-VDD operation. |
| UVLO threshold | 4.2V rising / 3.9V falling (typ) - ensures clean, glitch-free output behavior during power-up/down sequences. |
| Input hysteresis | 0.9V typical - provides noise immunity against EMI in high-dV/dt power environments like motor drives and solar inverters. |
| Operating temperature | –40°C to 140°C junction - validated for under-hood automotive, industrial SMPS, and high-density server PSU applications. |
Pinout & Package
UCC27526DSDT uses a thermally enhanced 3mm × 3mm WSON-8 package (DSD) with exposed thermal pad for low RθJA = 46.7°C/W. Pin numbering follows standard 8-pin WSON top-view layout with GND on Pin 3 and VDD on Pin 5.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (INA−) | Inverting input, Channel A | Drives OUTA low when high; must be tied to GND to enable non-inverting mode using INA+. |
| 2 (INB−) | Inverting input, Channel B | Drives OUTB low when high; must be tied to GND to enable non-inverting mode using INB+. |
| 3 (GND) | Power and signal reference | Common return path for all inputs, outputs, and internal logic; connects to PCB thermal pad for heat dissipation. |
| 4 (OUTB) | Output, Channel B | Low-side gate drive output capable of ±5A peak; rail-to-rail swing referenced to GND. |
| 5 (VDD) | Bias supply input | Single 4.5V–18V supply powering all internal circuits; requires local 0.1µF + 1µF bypassing. |
| 6 (OUTA) | Output, Channel A | Low-side gate drive output identical to OUTB; matched delay enables synchronous dual-switch control. |
| 7 (INB+) | Non-inverting input, Channel B | Drives OUTB high when high; must be tied to VDD to enable inverting mode using INB−. |
| 8 (INA+) | Non-inverting input, Channel A | Drives OUTA high when high; must be tied to VDD to enable inverting mode using INA−. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-input per channel (INA+/INA−, INB+/INB−) | Enables runtime reconfiguration between inverting and non-inverting modes without changing PCB layout or external components. |
| Independent input voltage tolerance | Input pins accept 0–18V signals regardless of VDD level - eliminates need for auxiliary level-shifters in multi-rail systems. |
| UVLO-locked low-state outputs | Guarantees both OUTA and OUTB remain low during power-up/down until VDD stabilizes above 4.2V, preventing unintended switch turn-on. |
| Floating-input safety logic | Internal pullup/pulldown resistors force outputs low if any input floats - critical for passing IEC 62368-1 and UL 62368-1 safety certifications. |
| Matched 1ns inter-channel delay | Allows parallel connection of OUTA and OUTB to double peak current drive (10A) without timing skew-induced shoot-through. |
Applications
| Motor Control Systems | Solar DC-DC Optimizers |
|---|---|
|
Use Scenario: Driving half-bridge GaN FETs in BLDC motor inverters operating at 100–500 kHz switching frequency. IC Role / Device Role / Timing Role: Low-side gate driver providing matched, high-current turn-on/turn-off pulses to upper and lower switches with sub-ns timing alignment. Use Value: Enables zero-voltage switching (ZVS) operation via precise dead-time control and reduces conduction losses through fast 7ns/6ns rise/fall times. |
Use Scenario: Gate-driving enhancement-mode GaN transistors in module-integrated DC-DC converters for residential PV panels. IC Role / Device Role / Timing Role: Dual-channel driver delivering independent, logic-configurable gate signals to synchronous rectifier and primary switch in bidirectional buck-boost topology. Use Value: Supports 4.5V minimum VDD operation to maintain functionality during low-light panel output, while 140°C rating ensures reliability in enclosed rooftop enclosures. |
| High-Density Server PSUs | GaN-Based Telecom Rectifiers |
|
Use Scenario: Driving paralleled SiC MOSFETs in 48V–12V intermediate bus converters with >1 MHz switching frequency. IC Role / Device Role / Timing Role: Dual-output driver configured with one channel in non-inverting mode (INA+) and the other in inverting mode (INB−) to generate complementary gate signals. Use Value: Eliminates external inverters or XOR gates, reducing component count and propagation delay uncertainty in digital control loops. |
Use Scenario: Controlling dual-phase interleaved GaN H-bridges in 48V telecom rectifiers operating in harsh ambient environments. IC Role / Device Role / Timing Role: Low-side driver providing rail-to-rail output swing and 5A peak current to sustain fast gate charging under high-temperature derating. Use Value: Maintains <13ns propagation delay across –40°C to 140°C, ensuring consistent timing margin in closed-loop voltage regulation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-side gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC27525DSDT | Single input per channel (INA/INB), no dual-input flexibility; includes dedicated ENA/ENB pins instead of INx+/INx− pairs. | Less suitable for designs requiring per-channel inverting/non-inverting reconfiguration; better for fixed-logic, enable-controlled topologies. | Select UCC27525DSDT only when enable pin control is prioritized over input-mode flexibility and board space allows SOIC-8 or MSOP-8 alternatives. |
| LM5113SDX/NOPB | 4A peak current, 17ns propagation delay, no inter-channel delay matching spec; supports bootstrap high-side drive in addition to low-side. | Targeted at half-bridge gate drive with integrated high-side bootstrap controller; not optimized for dual low-side-only or GaN-specific timing. | Choose LM5113SDX/NOPB only when high-side capability is required alongside low-side drive and ±4A current suffices for the target FET Qg. |
Compared with UCC27525DSDT and LM5113SDX/NOPB, the UCC27526DSDT uniquely supports per-channel logic polarity selection via dual inputs, offers tighter 1ns delay matching, and delivers higher 5A peak current - making it the optimal choice for GaN-based, high-frequency, dual-low-side applications demanding timing precision and configuration flexibility.
Availability
UCC27526DSDT is available at Aetrix Electronics and suitable for switched-mode power supplies, motor control systems, and solar DC-DC optimizers requiring stable component supply, long-term lifecycle support, and traceable sourcing for production programs.
Supply support for UCC27526DSDT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with decades of expertise in high-reliability power conversion solutions.
The UCC27526DSDT belongs to TI's UCC2752x family of high-speed low-side gate drivers, engineered specifically for emerging wide-bandgap power devices - emphasizing timing accuracy, thermal robustness, and logic flexibility in high-frequency power stage designs.
FAQ
What is the function of the INA+ and INA− pins on the UCC27526DSDT?
The INA+ and INA− pins on the UCC27526DSDT provide dual-input control for Channel A: INA+ serves as the non-inverting input, while INA− serves as the inverting input. To use Channel A in non-inverting mode, apply the PWM signal to INA+ and tie INA− to GND; for inverting mode, apply the signal to INA− and tie INA+ to VDD. This architecture enables flexible logic configuration without external components - a defining feature of the UCC27526DSDT versus other members of the UCC2752x family.
Does the UCC27526DSDT support operation below 5V supply voltage?
Yes, the UCC27526DSDT supports operation down to 4.5V VDD, with guaranteed performance across its full 4.5V–18V range. Its UVLO threshold starts at 3.7V (min) and rises to 4.5V (max), ensuring reliable startup even with marginal bias rails. This low-VDD capability makes the UCC27526DSDT especially suitable for driving GaN FETs that benefit from reduced gate drive voltage, and for systems powered from partially discharged batteries or low-headroom DC sources.
How does the UCC27526DSDT ensure safe operation when input pins are left unconnected?
The UCC27526DSDT incorporates internal pullup resistors on INA− and INB−, and pulldown resistors on INA+ and INB+, ensuring that any floating input forces the corresponding output low. This failsafe behavior prevents unintended power switch activation during system initialization, fault conditions, or PCB trace opens - a critical requirement for safety-certified power designs. This behavior is explicitly characterized and guaranteed across –40°C to 140°C, and is integral to the UCC27526DSDT's functional safety profile.
Can both outputs of the UCC27526DSDT be paralleled to increase drive strength?
Yes, the UCC27526DSDT supports paralleling OUTA and OUTB to deliver up to 10A peak source/sink current, enabled by its 1ns typical inter-channel delay matching. When configured with identical input signals (e.g., INA+ = INB+ and INA− = INB−), the two channels operate synchronously with negligible skew, minimizing shoot-through risk. This capability is explicitly documented in TI's UCC2752x datasheet and validated under load - a key differentiator of the UCC27526DSDT for driving high-Qg GaN or SiC devices in compact form factors.
What thermal performance can be expected from the UCC27526DSDT in a standard 2-layer PCB layout?
In a standard 2-layer PCB with 1-in² copper pour connected to the exposed thermal pad, the UCC27526DSDT achieves RθJA ≈ 46.7°C/W - significantly lower than SOIC-8 (130.9°C/W) or MSOP-8 (71.8°C/W) variants. With 1W dissipation, this yields ~47°C temperature rise above ambient, supporting continuous operation at full 5A drive into 1.8nF loads at 140°C junction temperature. TI recommends soldering the thermal pad with ≥6 thermal vias to inner ground planes for optimal performance - a design practice directly supported by the UCC27526DSDT's WSON-8 package construction.
UCC27526DSDT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-WDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- IGBT, N-Channel MOSFET
- Voltage - Supply:
- 4.5V ~ 18V
- Logic Voltage - VIL, VIH:
- 1V, 2.3V
- Current - Peak Output (Source, Sink):
- 5A, 5A
- Input Type:
- Inverting, Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 7ns, 6ns
- Operating Temperature:
- -40°C ~ 140°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SON (3x3)
UCC27526DSDT FAQ
1.How can I place an order for UCC27526DSDT through Aetrix?
Please submit a Request for Quotation (RFQ) for UCC27526DSDT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UCC27526DSDT reliable?
The price and inventory of UCC27526DSDT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCC27526DSDT is usually 5 days.
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Once your UCC27526DSDT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UCC27526DSDT?
For technical support, including UCC27526DSDT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCC27526DSDT requirements.
6.How does Aetrix verify that UCC27526DSDT is sourced from the original manufacturer or authorized distributors?
All UCC27526DSDT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCC27526DSDT meets industry standards.
7.What is the process for return or replacement of UCC27526DSDT?
All UCC27526DSDT units undergo pre-shipment inspection (PSI). If there is an issue with UCC27526DSDT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UCC27526DSDT part is unused and in its original packaging.
Return procedure for UCC27526DSDT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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