Texas Instruments UCC27624DR
- Part No.:
- UCC27624DR
- Manufacturer:
- Texas Instruments
- Category:
- Gate Drivers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
UCC27624DR.pdf
- Description:
- IC GATE DRVR LOW-SIDE 8SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
UCC27624DR from Texas Instruments is a dual-channel, low-side gate driver IC designed to drive MOSFETs, IGBTs, SiC, and GaN power switches in high-frequency switching stages. It delivers 5A peak source/sink current per channel, features 17ns typical propagation delay, –10V input tolerance, and operates from 4.5V to 26V VDD with UVLO - enabling robust control in SMPS, PFC, and motor drive power stages.
For engineers reviewing the UCC27624DR datasheet, UCC27624DR pinout, UCC27624DR application, or UCC27624DR equivalent, this page provides verified technical context, validated pin functions, confirmed thermal and switching specifications, and real-world application implementation guidance for high-efficiency, noise-immune gate drive design.
Technical Context
The UCC27624DR implements independent TTL-compatible input logic with 1V hysteresis and VDD-independent thresholds (1.0V low / 2.0V high), ensuring reliable operation across 3.3V and 5V controllers. Its hybrid output stage combines N- and P-channel MOSFETs to deliver boosted 5A peak source current during the Miller plateau, while maintaining 0.6Ω pulldown resistance for fast turn-off.
Each channel includes a dedicated enable pin (ENA/ENB) with internal 200kΩ pullup and –10V tolerance, allowing independent fault shutdown without affecting the other channel. The device supports parallel operation of both channels for 10A total drive capability and tolerates –2V output transients - critical for gate transformer coupling and ground-bounce resilience in high-dV/dt environments.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Peak Drive Current | 5A source/sink per channel - reduces MOSFET/SiC switch rise/fall times and lowers conduction + switching losses. |
| Propagation Delay | 17ns typical - enables precise dead-time control and improves transient response in high-frequency (>1 MHz) converters. |
| VDD Range | 4.5V to 26V with UVLO (4.1V on / 3.8V off) - supports wide-input auxiliary supplies and ensures glitch-free startup/shutdown. |
| Input Voltage Range | –10V to 30V - withstands ground bounce and eliminates need for clamping diodes when driving from pulse transformers. |
| Delay Matching | 1ns typical between channels - essential for synchronized paralleling of power devices and balanced current sharing. |
| Operating Temperature | –40°C to +150°C junction - qualified for under-hood automotive, industrial motor drives, and high-power density SMPS. |
| Output Transient Tolerance | –2V on OUTA/OUTB - prevents false triggering during high dV/dt switching node transitions. |
Pinout & Package
UCC27624DR is packaged in an 8-pin SOIC (D package) with PowerPAD™ thermal pad connected to GND. The exposed pad requires soldering to a large copper plane for optimal thermal performance (RθJB = 69.9°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INA (Pin 2) | Non-inverting input for Channel A | Drives OUTA high when >2.0V; internal 120kΩ pulldown holds OUTA low if floating - prevents unintended turn-on during startup. |
| INB (Pin 4) | Non-inverting input for Channel B | Independent control path for second switch; same threshold and hysteresis as INA for matched timing behavior. |
| ENA (Pin 1) | Enable input for Channel A | Active-high; internal 200kΩ pullup enables default operation if left open - allows pin-to-pin compatibility with legacy UCC27x24 drivers. |
| ENB (Pin 8) | Enable input for Channel B | Independent fault isolation: pulling ENB low disables only OUTB, preserving Channel A operation during partial system faults. |
| OUTA (Pin 7) | Channel A gate drive output | Capable of –2V transient tolerance and rail-to-rail swing (0V to VDD); optimized for direct connection to SiC/GaN gates. |
| OUTB (Pin 5) | Channel B gate drive output | Matched delay and drive strength to OUTA; supports paralleling with OUTA via external trace routing for 10A drive. |
| VDD (Pin 6) | Bias supply input | Requires ≥1μF + 0.1μF ceramic bypass to GND; UVLO protection holds outputs low below 3.8V to prevent weak turn-on. |
| GND (Pin 3) | Power and signal reference | All inputs, outputs, and internal logic referenced here; thermal pad must be connected to GND plane for RθJA = 126.4°C/W. |
Key Features
| Feature | Design Value |
|---|---|
| –10V input capability | Enables direct interface with gate drive transformers and survives >5V ground bounce without external clamping. |
| Hybrid pull-up output stage | N+P-MOSFET architecture delivers 5A peak current during Miller plateau - cuts SiC/GaN turn-on time by up to 40% vs. standard drivers. |
| Independent per-channel enable | Allows selective shutdown of one power leg during light-load synchronous rectification - improves efficiency without firmware changes. |
| 1ns typical inter-channel delay match | Supports paralleled power devices with <±0.5ns skew - eliminates current imbalance and thermal derating in multi-phase designs. |
| TTL-compatible, VDD-independent thresholds | 1.0V/2.0V logic levels work with 3.3V microcontrollers and 5V PWM controllers without level shifters or supply dependency. |
Applications
| Switched-Mode Power Supplies (SMPS) | Power Factor Correction (PFC) |
|---|---|
|
Use Scenario: High-frequency half-bridge or full-bridge DC/DC converter operating at 500 kHz–2 MHz with SiC MOSFETs. IC Role / Device Role: Low-side gate driver for primary-side switches, delivering fast, matched turn-on/turn-off to minimize shoot-through risk and switching losses. Use Value: 17ns propagation delay and 1ns channel matching enable <50ns dead-time optimization, increasing efficiency by 0.8–1.2% at 100W–1kW output. |
Use Scenario: Interleaved boost PFC stage using dual 650V SiC MOSFETs per phase, requiring precise gate timing and noise immunity. IC Role / Device Role: Dual-channel driver controlling two parallel low-side switches per phase, with independent EN pins for phase shedding. Use Value: –10V input tolerance eliminates gate-clamp diodes; 5A drive sustains 100A peak gate current for fast SiC turn-on, reducing EMI filter size. |
| Motor Drives | Solar Inverters |
|
Use Scenario: 3-phase BLDC inverter for industrial pumps, operating at 20 kHz PWM with IGBTs and active short-circuit protection. IC Role / Device Role: Low-side driver for all six IGBT gates, using EN pins for rapid fault shutdown and INA/INB for complementary PWM control. Use Value: –2V output transient tolerance prevents false triggering during IGBT short-circuit events; 150°C rating supports sealed motor housing mounting. |
Use Scenario: String-level MPPT optimizer with integrated DC/DC conversion, using GaN HEMTs switched at 1.2 MHz. IC Role / Device Role: Dual gate driver for synchronous buck stage, where matched delays ensure zero-voltage switching (ZVS) across load range. Use Value: 6ns rise / 10ns fall time enables <10ns gate timing resolution; 4.5–26V VDD range accommodates variable PV input voltage without auxiliary regulation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual low-side gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC27524ADRV | Same pinout, 5A drive, but no –10V input rating (max –3V); 25ns propagation delay; no hybrid pull-up stage. | Limited to lower-noise 3.3V/5V controller interfaces; unsuitable for gate transformer coupling or severe ground bounce. | Select UCC27524ADRV only if cost sensitivity outweighs noise immunity and speed requirements - not recommended for SiC/GaN or high-dV/dt systems. |
| LM5113SDX | 4A peak drive, 20ns propagation delay, –5V input rating, no independent EN pins (shared enable), 125°C max junction temp. | Requires external enable logic for per-channel control; thermal margin insufficient for continuous 150°C ambient motor drive enclosures. | Choose LM5113SDX only for legacy 125°C-rated industrial SMPS where board space constraints preclude SOIC-8 PowerPAD™ layout. |
Compared with UCC27524ADRV and LM5113SDX, the UCC27624DR delivers superior noise immunity (–10V inputs), faster timing (17ns vs. ≥20ns), higher thermal capability (150°C vs. ≤125°C), and true per-channel enable - making it the only option qualified for next-generation SiC/GaN power stages demanding reliability at extreme dV/dt and temperature.
Availability
UCC27624DR is available at Aetrix Electronics and suitable for switched-mode power supplies, motor drives, and solar inverters requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing for production ramp and field replacement.
Supply support for UCC27624DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management technologies, with over 50 years of innovation in high-reliability power control solutions.
The UCC27624DR belongs to TI's high-speed gate driver product line, engineered specifically for high-efficiency, high-frequency power conversion systems using wide-bandgap semiconductors - emphasizing noise immunity, thermal robustness, and precise timing control.
FAQ
What is the maximum allowable negative voltage on the INA and INB pins of the UCC27624DR?
The UCC27624DR supports –10V on INA and INB pins per Absolute Maximum Ratings. This rating enables direct connection to gate drive transformers and operation in systems with significant ground bounce - eliminating the need for external clamping diodes and reducing BOM count. Exceeding –10V risks permanent damage to the input protection structure.
Can both output channels of the UCC27624DR be paralleled to increase drive current?
Yes, the UCC27624DR supports channel paralleling: connect INA to INB, ENA to ENB, and OUTA to OUTB externally to achieve up to 10A peak drive current. The 1ns typical delay matching ensures synchronized switching, minimizing shoot-through risk. Ensure equal PCB trace lengths and shared gate resistor placement to maintain current balance.
Does the UCC27624DR include undervoltage lockout (UVLO), and what are its thresholds?
Yes, the UCC27624DR integrates UVLO with a rising threshold of 4.1V (typical) and falling threshold of 3.8V (typical), providing 0.3V hysteresis. When VDD drops below 3.8V, both outputs are actively held low by strong internal pulldowns - preventing weak or partial turn-on of power switches during brownout conditions.
What is the purpose of the thermal pad on the UCC27624DR SOIC-8 package?
The exposed thermal pad on the UCC27624DR (D package) must be soldered to a GND-connected copper plane to achieve specified thermal performance. With proper layout, it reduces junction-to-board thermal resistance to 69.9°C/W - critical for sustaining 5A drive current at 150°C junction temperature. Leaving the pad unconnected degrades RθJA to 126.4°C/W and risks thermal shutdown.
How does the UCC27624DR handle floating input pins like INA or INB?
The UCC27624DR incorporates internal 120kΩ pulldown resistors on INA and INB. If either pin is left floating, the corresponding output (OUTA or OUTB) remains firmly held low - preventing unintended power switch turn-on during initialization, fault conditions, or controller reset. This feature enhances safety compliance in industrial and automotive applications.
UCC27624DR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 4.5V ~ 26V
- Logic Voltage - VIL, VIH:
- 1.2V, 1.8V
- Current - Peak Output (Source, Sink):
- 5A, 5A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 6ns, 10ns
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
UCC27624DR FAQ
1.How can I place an order for UCC27624DR through Aetrix?
Please submit a Request for Quotation (RFQ) for UCC27624DR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UCC27624DR reliable?
The price and inventory of UCC27624DR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCC27624DR is usually 5 days.
3.What payment methods are accepted for UCC27624DR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UCC27624DR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for UCC27624DR?
UCC27624DR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UCC27624DR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UCC27624DR?
For technical support, including UCC27624DR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCC27624DR requirements.
6.How does Aetrix verify that UCC27624DR is sourced from the original manufacturer or authorized distributors?
All UCC27624DR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCC27624DR meets industry standards.
7.What is the process for return or replacement of UCC27624DR?
All UCC27624DR units undergo pre-shipment inspection (PSI). If there is an issue with UCC27624DR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UCC27624DR part is unused and in its original packaging.
Return procedure for UCC27624DR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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