Texas Instruments UCC29002DR/1
- Part No.:
- UCC29002DR/1
- Manufacturer:
- Texas Instruments
- Category:
- Power Management - Specialized
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
UCC29002DR/1.pdf
- Description:
- IC LOAD SHARE CTRLR ADV 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,650
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Product details
Overview
UCC29002DR/1 from Texas Instruments is an advanced 8-pin BiCMOS load-share controller for paralleling DC-DC modules and power supplies in N+1 redundant systems. It delivers <1% current-share error at full load, supports high-side or low-side current sensing via ultra-low-offset amplifier (±100 µV), and complies with Intel® SSI load-share specification. Used in telecom rectifiers and server power shelves to balance output current across multiple modules.
For engineers reviewing the UCC29002DR/1 datasheet, UCC29002DR/1 pinout, UCC29002DR/1 application, or UCC29002DR/1 equivalent, key selection criteria include its single-wire load-share bus architecture, ±100 µV current-sense offset, VSSOP-8 package (3.00 mm × 4.90 mm), and start-up behavior where adjust current is forced to maximum - critical for rapid current engagement in distributed power systems.
Technical Context
The UCC29002DR/1 implements automatic leader/follower architecture using a transconductance error amplifier (gM = 14 mS) and a post-package-trimmed current-sense amplifier with 75–90 dB gain and CMRR. Its load-share bus driver operates as a unity-gain buffer with ideal-diode behavior to establish leadership dynamically among parallel modules.
It features dual-mode enable logic tied to CS+/CS− pins, LS bus fault protection via window comparator (VLS < 2/3×VCSO or VLS > VVDD − 0.7 V), and start-up mode that forces ADJ sink current to maximum until VCSO exceeds 80% of VLS, ensuring fast load engagement without external sequencing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Current-share accuracy | <1% error at full load - enables precise current balancing across ≥2 parallel power modules without manual trimming. |
| Current-sense offset voltage | ±100 µV max at 25°C - allows use of low-value shunt resistors (e.g., 0.5 mΩ) to minimize I²R loss in high-current paths. |
| Supply voltage range | 4.575 V to 13.5 V - compatible with 5 V, 12 V, and intermediate bias rails; includes internal 14.25 V clamp for overvoltage protection. |
| Operating temperature | –40°C to +105°C - qualified for industrial and telecom base station environments with extended thermal margin. |
| Load-share bus drive | ±1.5 mA output capability - supports up to 10 modules on shared LS bus when VLS full-scale ≤ 10 V and RIN = 100 kΩ. |
| ADJ sink current | 3.35–4.55 mA (–40°C to +105°C) - directly adjusts remote-sense feedback voltage of connected DC-DC controllers (e.g., TPS4005x, LM25145). |
| UVLO threshold | 4.375 V (typical) with 0.375 V hysteresis - prevents erratic operation during brownout while maintaining tight current-share accuracy above turn-on. |
Pinout & Package
UCC29002DR/1 is housed in an 8-pin VSSOP package (DGK), measuring 3.00 mm × 4.90 mm, with exposed pad for thermal enhancement and lead-free assembly compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS− (Pin 1) | Inverting input of current-sense amplifier | Accepts low-side or high-side shunt return; used with CS+ to generate differential sense signal; also part of ENABLE comparator. |
| CS+ (Pin 2) | Noninverting input of current-sense amplifier | Connects to shunt high-side or low-side node; common-mode range spans 0 V to VVDD, enabling flexible placement. |
| VDD (Pin 3) | Power supply input | Bias rail (4.575–13.5 V); requires local 0.1–1 µF low-ESL capacitor; internal 14.25 V clamp protects against overvoltage. |
| GND (Pin 4) | Reference ground | Common return for all analog and power functions; must connect to converter S− path to avoid ground-loop errors. |
| ADJ (Pin 5) | Adjust amplifier output | Sinks current proportional to EAO error voltage; drives remote-sense network to raise module output voltage during sharing. |
| EAO (Pin 6) | Error amplifier output | Transconductance output (14 mS); develops VEAO across compensation network to control ADJ current magnitude. |
| LS (Pin 7) | Load-share bus I/O | Drives and monitors shared bus; disconnects during fault/disable; internal 100 kΩ input impedance minimizes bus loading. |
| CSO (Pin 8) | Current-sense amplifier output | Amplified shunt voltage (0–VVDD−1.7 V); feeds LS bus driver and error amplifier; gain programmable (min 3×). |
Key Features
| Feature | Design Value |
|---|---|
| Single-wire load-share bus | Reduces inter-module wiring to one trace; eliminates complex bus arbitration and enables plug-and-play scalability up to 10 modules. |
| Intel® SSI compliance | Meets Server System Infrastructure specification for current-sharing accuracy, bus fault response, and startup timing - required for OEM server qualification. |
| High-side/low-side sensing support | CS+/CS− common-mode range (0 V to VVDD) allows shunt placement in either output rail or GND return - avoids level-shifting circuits in high-voltage designs. |
| LS bus short-circuit protection | Window comparator disables controller if VLS falls below 2/3×VCSO or rises above VVDD−0.7 V - prevents erroneous voltage adjustment during bus faults. |
| Start-up current forcing | ADJ sink current driven to maximum at power-on until VCSO ≥ 80% of VLS - ensures rapid current ramp and eliminates startup imbalance in multi-module systems. |
Applications
| Telecom Rectifier Systems | Server Power Shelves |
|---|---|
|
Use Scenario: Paralleling multiple 48 V DC-DC modules in central office power systems to deliver >2 kW with N+1 redundancy. IC Role / Device Role / Timing Role: Load-share controller coordinating current distribution across up to 10 hot-swappable modules via single LS bus. Use Value: Achieves <1% current mismatch under transient load steps, eliminating need for per-module trim pots and reducing field failure rates. |
Use Scenario: Balancing output current among redundant 12 V VRMs in rack-mounted servers with dynamic CPU/GPU loads. IC Role / Device Role / Timing Role: Real-time current-sense amplifier and transconductance error amplifier driving ADJ pin to modulate VRM feedback. Use Value: Maintains balanced thermal stress across VRMs during burst-mode operation, extending MOSFET lifetime by >30% vs. uncontrolled paralleling. |
| Industrial PLC Power Supplies | Medical Imaging Power Modules |
|
Use Scenario: Combining isolated 24 V outputs from three DIN-rail power supplies to feed high-current I/O backplanes. IC Role / Device Role / Timing Role: High-side current sensing on each supply's positive rail, with LS bus coordination and fault isolation. Use Value: Enables seamless failover during single-supply outage without output voltage droop or system reset - meets SIL-2 functional safety requirements. |
Use Scenario: Parallel operation of 50 V, 20 A power modules supplying X-ray generator inverters with strict ripple and stability limits. IC Role / Device Role / Timing Role: Low-offset (±100 µV) current sensing and precision error amplification to suppress current harmonics below 100 ppm. Use Value: Reduces electromagnetic interference on sensitive detector circuits by minimizing current-loop imbalances that cause ground noise coupling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar load-share controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| UCC39002 | Same pinout and electrical specs; wider operating temperature range (0°C to 70°C) but no industrial-grade qualification. | Limited to commercial environments; lacks –40°C to +105°C rating required for outdoor telecom or industrial enclosures. | Select UCC39002 only for cost-sensitive, non-industrial applications where ambient temperature stays within 0–70°C. |
| UCC29002-1 | Identical package and pinout; differs only in start-up logic - ADJ current follows EAO voltage instead of being forced to max. | Slower current engagement during power-on; avoids voltage overshoot in sensitive loads like MRI gradient amplifiers. | Choose UCC29002-1 when controlled ramp-up is preferred over rapid load capture - e.g., medical or test equipment. |
Compared with UCC39002 and UCC29002-1, the UCC29002DR/1 uniquely combines industrial temperature range (–40°C to +105°C), forced-startup ADJ current for fastest current acquisition, and full SSI compliance - making it the default choice for telecom infrastructure and ruggedized server platforms.
Availability
UCC29002DR/1 is available at Aetrix Electronics and suitable for telecom rectifier systems, server power shelves, and industrial PLC power supplies requiring stable component supply across long production lifecycles.
Supply support for UCC29002DR/1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog and embedded processing technologies, with decades of leadership in power management ICs.
The UCC29002DR/1 belongs to TI's advanced load-share controller product line, designed specifically for high-reliability N+1 redundant power systems in server, telecom, and industrial distributed power architectures.
FAQ
What is the primary function of the UCC29002DR/1 in a multi-module power system?
The UCC29002DR/1 serves as a load-share controller that dynamically balances output current among parallel-connected DC-DC modules or power supplies. It achieves this by measuring each module's current via a shunt resistor, amplifying the signal with a ±100 µV offset amplifier, comparing it to the leader module's current on a shared LS bus, and adjusting the module's output voltage through the ADJ pin - all while maintaining <1% current-share error at full load.
How does the UCC29002DR/1 handle load-share bus faults such as shorts to ground or supply rail?
The UCC29002DR/1 continuously monitors the LS bus voltage using an internal window comparator. If VLS drops below 2/3×VCSO or rises above VVDD − 0.7 V, the LS-bus FAULT signal is asserted, disabling the load-share bus driver and forcing ADJ sink current to zero. This prevents erroneous voltage adjustments and isolates the faulty module - a behavior confirmed in the SLUS495J datasheet Section 6.3.7.
Can the UCC29002DR/1 be used with high-side current sensing in a 48 V output power supply?
Yes - the UCC29002DR/1 supports high-side current sensing because its CS+/CS− inputs have a common-mode range spanning 0 V to VVDD. For a 48 V output, place the shunt in the positive rail and ensure CS− remains ≤ 0.3 V above VVDD; otherwise, pull CS+ at least 0.5 V below CS− to disable the device safely. This configuration avoids level-shifting circuitry and preserves measurement accuracy.
What is the significance of the "/1" suffix in UCC29002DR/1?
Per TI's packaging documentation, the "/1" suffix in UCC29002DR/1 denotes the UCC29002-1 variant - a version with modified start-up logic where the ADJ pin current follows the EAO error voltage rather than being forced to maximum at power-on. This results in slower, smoother current engagement, making UCC29002DR/1 preferable for applications sensitive to voltage overshoot during startup.
Does the UCC29002DR/1 require external compensation components, and where are they connected?
Yes - the UCC29002DR/1 requires external compensation on the EAO pin (Pin 6). A resistor and capacitor network between EAO and GND sets the transconductance error amplifier's loop bandwidth and phase margin. Typical values are REA = 2.2 kΩ and CEA = 1 nF, as shown in Figure 7-3 of the SLUS495J datasheet. Incorrect compensation can cause instability or poor transient current-sharing response.
UCC29002DR/1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Load Share Controller
- Current - Supply:
- 2.5mA
- Voltage - Supply:
- 4.375V ~ 14.25V
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
UCC29002DR/1 FAQ
1.How can I place an order for UCC29002DR/1 through Aetrix?
Please submit a Request for Quotation (RFQ) for UCC29002DR/1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for UCC29002DR/1 reliable?
The price and inventory of UCC29002DR/1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UCC29002DR/1 is usually 5 days.
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UCC29002DR/1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your UCC29002DR/1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for UCC29002DR/1?
For technical support, including UCC29002DR/1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UCC29002DR/1 requirements.
6.How does Aetrix verify that UCC29002DR/1 is sourced from the original manufacturer or authorized distributors?
All UCC29002DR/1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UCC29002DR/1 meets industry standards.
7.What is the process for return or replacement of UCC29002DR/1?
All UCC29002DR/1 units undergo pre-shipment inspection (PSI). If there is an issue with UCC29002DR/1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The UCC29002DR/1 part is unused and in its original packaging.
Return procedure for UCC29002DR/1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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