Texas Instruments UCC37322D

Overview

UCC37322D from Texas Instruments is a noninverting 9-A peak-current low-side MOSFET driver in SOIC-8 package, delivering ±9 A at the Miller plateau region with 20-ns rise/fall times (10-nF load), 35-ns input-rising propagation delay, and 4.5–15-V supply operation - used to drive N-channel power MOSFETs in high-frequency switch-mode power supplies.

For engineers reviewing the UCC37322D datasheet, UCC37322D pinout, UCC37322D application, or UCC37322D equivalent, this page delivers verified functional identity, thermal resistance (θ_jc = 42°C/W), enable-input hysteresis (0.25–0.90 V), output resistance (0.4–1.0 Ω low-side), and noninverting logic behavior - all confirmed for the D-package variant.

Technical Context

The UCC37322D implements TrueDrive - a hybrid bipolar/MOSFET output stage - enabling efficient ±9-A peak sourcing/sinking precisely during the Miller plateau where gate charge demands are highest. Its dual VDD pins (pins 1 & 8) and separated AGND/PGND grounds minimize noise coupling between control and power paths.

It features TTL/CMOS-compatible inputs independent of supply voltage, active-high enable (ENBL) with internal 100-kΩ pull-up and 0.25–0.90-V hysteresis, and logic behavior defined by Table 8-1: ENBL = LOW forces OUT = LOW regardless of IN state; ENBL = HIGH enables noninverting transfer (IN = HIGH → OUT = HIGH).

Key Specifications

Pinout & Package

UCC37322D is housed in an 8-pin SOIC (D) package with 3.91 mm × 4.90 mm body size and standard industry footprint. Thermal resistance is θ_jc = 42°C/W, supporting up to 650 mW power dissipation at T_A = 25°C.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar low-side MOSFET driver applications.

Compared with UCC37321D and TPS2829DBVR, the UCC37322D uniquely combines noninverting logic, 9-A Miller-current capability, and enable functionality in a thermally robust SOIC-8 - making it irreplaceable for high-efficiency, high-power-density switch-mode systems requiring precise gate control and hardware fault response.

Availability

UCC37322D is available at Aetrix Electronics and suitable for switch-mode power supplies, motor controllers, Class-D amplifiers, and DC-DC converters requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for UCC37322D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and power management ICs, with decades of expertise in high-reliability power conversion solutions.

The UCC37322D belongs to TI's UCC3732x family of high-speed low-side drivers, designed specifically for demanding gate-drive applications in industrial power supplies, motor drives, and audio amplifiers where Miller-current handling and thermal robustness are critical.

FAQ

What is the logic configuration of the UCC37322D?

The UCC37322D is a noninverting low-side MOSFET driver: when ENBL is high, a HIGH input on pin 2 produces a HIGH output on pins 6 and 7; a LOW input produces a LOW output. This matches controllers with active-high PWM outputs. The UCC37322D logic table (Table 8-1 in SLUS504I) confirms this behavior - distinct from the inverting UCC37321D.

Does the UCC37322D support 3.3-V logic inputs?

Yes - the UCC37322D features TTL/CMOS-compatible inputs independent of supply voltage, with VIN_H = 1.6–2.5 V and VIN_L = 0.8–1.5 V across the full 4.5–15-V VDD range. A 3.3-V microcontroller GPIO can directly drive the IN pin without level shifting, and the input withstands 500-mA reverse current without damage or logic upset.

How does the ENBL pin behave when left unconnected on the UCC37322D?

When left unconnected, the ENBL pin (pin 3) is internally pulled up to VDD via a 100-kΩ resistor, resulting in active-high enable - the UCC37322D operates normally. This allows drop-in replacement of legacy drivers without board modification. However, for noise immunity in high-dV/dt environments, TI recommends tying ENBL to VDD through a 10-kΩ resistor.

What is the maximum capacitive load the UCC37322D can drive while maintaining 20-ns rise time?

The 20-ns typical rise time is specified with a 10-nF load (per Section 7.6). At 15-V VDD, the UCC37322D maintains <30-ns rise time up to 40-nF (Figure 7-9), but beyond that, slew rate degrades significantly. For >40-nF loads (e.g., paralleled MOSFETs), external gate resistors must be minimized and layout optimized - the UCC37322D itself does not limit drive strength, but PCB parasitics dominate.

Why does the UCC37322D have two VDD pins and separate AGND/PGND pins?

The dual VDD pins (1 and 8) reduce series impedance and improve high-current transient response; AGND (pin 4) references the input/enable circuitry, while PGND (pin 5) returns output current - separating them prevents di/dt-induced noise from modulating input thresholds. TI mandates connecting AGND and PGND with a single thick trace directly under the UCC37322D package to maintain signal integrity.