NXP Semiconductors UJA1131HW/FD/3V/4Y

Overview

UJA1131HW/FD/3V/4Y from NXP Semiconductors is a buck/boost System Basis Chip (SBC) for automotive ECUs, integrating a 3.3 V/500 mA LDO (V1), ISO 11898-2/6-compliant HS-CAN transceiver supporting CAN FD up to 2 Mbit/s, dual LIN transceivers, and CAN FD-passive partial networking. It delivers fail-safe operation via watchdog, limp-home outputs (HVIO2–HVIO4), and battery monitoring with 10-bit ADC. Used in engine control modules requiring robust low-voltage operation down to 2 V during cranking.

For engineers reviewing the UJA1131HW/FD/3V/4Y datasheet, UJA1131HW/FD/3V/4Y pinout, UJA1131HW/FD/3V/4Y application, or UJA1131HW/FD/3V/4Y equivalent, this page provides verified technical context, validated pin functions, confirmed automotive power management features, and real-world ECU integration constraints - all specific to the UJA1131HW/FD/3V/4Y variant with 3.3 V V1, CAN FD partial networking, and 4 HVIOs.

Technical Context

The UJA1131HW/FD/3V/4Y implements a dual-mode SMPS that automatically switches between buck and boost based on input voltage and load, enabling continuous microcontroller supply at battery voltages as low as 2 V. Its CAN transceiver complies with ISO 11898-2:201x and ISO 11898-6:2013, supporting CAN FD-passive partial networking to suppress false wake-ups during CAN FD traffic.

This variant integrates two LIN transceivers compliant with SAE J2602 and LIN 2.x, four configurable HVIOs (HS/LS/wake-up), and a 10-bit battery A/D converter with dual-channel sensing. All configuration-including limp-home behavior, sleep mode enable, and SMPS pre-regulator voltage-is stored in non-volatile memory for application-specific adaptation.

Key Specifications

Pinout & Package

UJA1131HW/FD/3V/4Y uses the HTQFP48 package (SOT1181-2) with an exposed die pad thermally connected to GND. The 48-pin layout supports dual LIN, HS-CAN, SMPS coil interface, 4 HVIOs, SPI, reset/interrupt I/O, and battery sensing - all optimized for automotive ECU PCB routing and thermal management.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar System Basis Chip applications.

Compared with UJA1131HW/FD/3V/4Y, UJA1132HW/FD/3V/4 offers higher boost-current headroom for demanding microcontrollers, while TLE9471-2ES trades LIN integration and HVIO configurability for tighter CAN FD timing control and built-in supervision - making each suitable for distinct ECU partitioning strategies.

Availability

UJA1131HW/FD/3V/4Y is available at Aetrix Electronics and suitable for engine control units, transmission control modules, body control modules, and ADAS sensor hubs requiring stable component supply across automotive production lifecycles.

Supply support for UJA1131HW/FD/3V/4Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on automotive, industrial, and IoT applications, with deep expertise in automotive-grade mixed-signal SoCs and system basis chips.

The UJA113x product line was designed specifically for next-generation automotive ECUs requiring integrated power management, robust CAN/LIN connectivity, and fail-safe operation under extreme battery conditions - targeting ASIL-B functional safety compliance.

FAQ

What is the minimum battery voltage at which UJA1131HW/FD/3V/4Y maintains 3.3 V output?

UJA1131HW/FD/3V/4Y sustains regulated 3.3 V output down to 2 V battery input using its integrated boost converter. This capability is validated under load conditions up to 500 mA and enables reliable ECU operation during engine cranking events. The actual minimum sustainable voltage depends on output load and temperature, but 2 V is the specified lower limit per the datasheet.

Does UJA1131HW/FD/3V/4Y support both classic CAN and CAN FD simultaneously?

Yes, UJA1131HW/FD/3V/4Y supports both protocols: it operates as a full CAN FD transceiver up to 2 Mbit/s in the data field, while remaining backward compatible with classic CAN 2.0B at 1 Mbit/s. Its CAN FD-passive partial networking feature allows it to ignore CAN FD traffic in Sleep mode - preserving compatibility with mixed-network systems containing legacy CAN nodes.

How many LIN transceivers does UJA1131HW/FD/3V/4Y integrate?

UJA1131HW/FD/3V/4Y integrates two LIN transceivers compliant with SAE J2602 and LIN 2.x standards. Both channels include integrated slave termination and support downward compatibility with LIN 1.3. This dual-LIN capability eliminates the need for external transceivers in multi-node body electronics applications.

What is the function of the LIMP pin on UJA1131HW/FD/3V/4Y?

The LIMP pin (Pin 39) on UJA1131HW/FD/3V/4Y is a dedicated output for activating hardware-level limp-home functionality during critical system failures. It is driven by configurable HVIOs: HVIO2 (static HIGH), HVIO3 (100 Hz, 10 % duty cycle), or HVIO4 (1.25 Hz, 50 % duty cycle) - providing standardized fault-signaling waveforms without external timing components.

Is UJA1131HW/FD/3V/4Y pin-compatible with other UJA113x variants in the HTQFP48 package?

Yes, all UJA113x variants including UJA1131HW/FD/3V/4Y use the identical HTQFP48 (SOT1181-2) package with consistent pin mapping. However, functional differences exist: UJA113xFD/0 variants disable HVIO5–HVIO8, and UJA113xFD/x devices implement CAN FD-passive logic not present in non-FD versions - requiring firmware and system-level validation despite mechanical compatibility.