NXP Semiconductors UJA1131HW/FD/5V/4Y

Overview

UJA1131HW/FD/5V/4Y from NXP Semiconductors is a buck/boost System Basis Chip (SBC) for automotive ECUs, integrating a 5 V/500 mA LDO (V1), ISO 11898-2/6-compliant HS-CAN transceiver supporting CAN FD up to 2 Mbit/s, dual LIN transceivers, and CAN FD-passive partial networking. It delivers fail-safe operation via watchdog, limp-home outputs (HVIO2–HVIO4), and battery monitoring with 10-bit ADC - deployed in engine control modules requiring robust low-voltage resilience down to 2 V.

For engineers reviewing the UJA1131HW/FD/5V/4Y datasheet, UJA1131HW/FD/5V/4Y pinout, UJA1131HW/FD/5V/4Y application, or UJA1131HW/FD/5V/4Y equivalent, this page provides verified technical context on its SMPS buck/boost behavior, CAN FD-passive wake-up logic, HVIO configuration, and HTQFP48 package implementation - all confirmed against NXP's Rev. 2 product data sheet (July 2016).

Technical Context

The UJA1131HW/FD/5V/4Y implements a single-coil switched-mode power supply (SMPS) with automatic buck-to-boost transition at input voltages below ~5.5 V, sustaining microcontroller operation during battery dips to 2 V. Its CAN transceiver complies fully with ISO 11898-2:201x and ISO 11898-6:2013, enabling CAN FD-passive selective wake-up that ignores CAN FD traffic in Sleep mode without bus errors.

This variant includes dual LIN transceivers (LIN 2.x/SAE J2602 compliant), four configurable HVIOs (HS/LS/wake-up), and non-volatile memory for persistent configuration of limp-home behavior, power-on sequencing, and sleep mode enablement - all managed via 16-/24-/32-bit SPI interface with two interrupt outputs (INTN1, INTN2) for priority-based fault reporting.

Key Specifications

Pinout & Package

HTQFP48 package with 48-pin quad flat layout and thermally enhanced exposed die pad (internally connected to GND). Pin 1 = BATV2; Pin 48 = BOOTH2. The die pad must be soldered to a PCB ground plane for thermal management and EMI suppression.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar System Basis Chip applications.

Compared with UJA1131HW/FD/5V/4Y, UJA1132HW/FD/5V/4 offers stronger boost capability for deeper battery dips, while TLE9471-2ES trades dual LIN and CAN FD-passive for lower integration cost - making it viable only where those features are unused.

Availability

UJA1131HW/FD/5V/4Y is available at Aetrix Electronics and suitable for automotive engine control units, transmission control modules, and ADAS domain controllers requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for UJA1131HW/FD/5V/4Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications - with deep expertise in automotive-grade power management and high-speed serial interfaces.

The UJA113x family was designed specifically for next-generation automotive Electronic Control Units requiring integrated buck/boost power conversion, CAN FD readiness, and fail-safe limp-home functionality - targeting ASIL-B system compliance.

FAQ

What is the minimum battery voltage at which UJA1131HW/FD/5V/4Y can sustain 5 V/500 mA output?

The UJA1131HW/FD/5V/4Y maintains regulated 5 V output at battery voltages as low as 2 V using its boost-mode SMPS - though achievable load current depends on thermal conditions and external coil selection. At 2 V input, full 500 mA is supported under typical ambient conditions with proper heatsinking via the HTQFP48 exposed pad. This enables uninterrupted MCU operation during cold-crank events.

Does UJA1131HW/FD/5V/4Y support true CAN FD communication or only CAN FD-passive wake-up?

UJA1131HW/FD/5V/4Y supports full CAN FD active communication at data rates up to 2 Mbit/s in the CAN FD data field, per ISO 11898-2:201x timing parameters. Its CAN FD-passive feature applies only to Sleep mode - allowing it to ignore CAN FD traffic without generating bus errors. In Normal/Standby modes, it actively participates in CAN FD networks as a full node.

How many LIN transceivers does UJA1131HW/FD/5V/4Y integrate, and are they independently configurable?

UJA1131HW/FD/5V/4Y integrates two fully independent LIN transceivers (LIN1 and LIN2), both compliant with LIN 2.x and SAE J2602. LIN2 is internally connected in this variant - pin 25 (LIN2) must be left unconnected on the PCB. Each channel supports separate slave termination, independent wake-up detection, and configurable baud rates via SPI.

Can the HVIO pins on UJA1131HW/FD/5V/4Y be used for both driving loads and sensing wake-up events?

Yes - each of the four HVIO pins (HVIO1–HVIO4) on UJA1131HW/FD/5V/4Y is individually configurable as a high-side driver, low-side driver, or wake-up input via SPI registers. Wake-up inputs support selectable edge (rising/falling) and ratiometric or absolute voltage thresholds, with wake-up source reporting through the SPI interface.

Is non-volatile memory programming required to enable CAN FD-passive partial networking on UJA1131HW/FD/5V/4Y?

No - CAN FD-passive partial networking is a hardware-enforced feature of the UJA1131HW/FD/5V/4Y and is active by default in Sleep mode without NVM configuration. However, NVM is used to configure related behaviors such as wake-up source enablement, limp-home waveform selection (HVIO2–HVIO4), and Sleep mode disable/enable - all of which persist across power cycles.