NXP Semiconductors UJA1132HW/FD/3V/0Y

Overview

UJA1132HW/FD/3V/0Y from NXP Semiconductors is a buck/boost System Basis Chip (SBC) for automotive ECUs, integrating a 3.3 V/500 mA LDO (V1), ISO 11898-2/6-compliant HS-CAN transceiver supporting CAN FD up to 2 Mbit/s, dual LIN transceivers, and a high-current boost-capable SMPS enabling operation down to 2 V battery input. It delivers fail-safe power management, limp-home outputs, and partial networking with CAN FD-passive wake-up.

For engineers reviewing the UJA1132HW/FD/3V/0Y datasheet, UJA1132HW/FD/3V/0Y pinout, UJA1132HW/FD/3V/0Y application, or UJA1132HW/FD/3V/0Y equivalent, this page provides verified functional identity, validated HTQFP48 pin mapping, confirmed dual-LIN + CAN FD timing compliance, and real-world ECU power architecture context - not generic SBC descriptions.

Technical Context

The UJA1132HW/FD/3V/0Y implements a fully autonomous buck-boost SMPS with single-coil topology, automatic mode selection, and Pass-through capability for ultra-low quiescent current. Its CAN transceiver meets ISO 11898-2:201x and ISO 11898-6:2013, enabling CAN FD-passive partial networking - allowing sleep-mode retention during CAN FD traffic without bus errors.

This variant features two LIN transceivers compliant with LIN 2.x and SAE J2602, a 10-bit battery A/D converter with dual-channel monitoring, and SPI-configurable non-volatile settings for power-on behavior, limp-home output patterns (HVIO2–HVIO4), and watchdog window/timeout modes - all coordinated by an integrated system controller state machine.

Key Specifications

Pinout & Package

UJA1132HW/FD/3V/0Y is housed in a 48-pin HTQFP48 package (SOT1181-2) with 10 mm × 10 mm footprint and exposed thermal pad internally connected to GND. The pinout reflects the /FD/0 variant: HVIO5–HVIO8 and BATHS2 are not connected; HVIO1–HVIO4 and BATHS1 are internally connected per datasheet Table 3 and Figure 3.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar System Basis Chip applications.

Compared with UJA1132HW/FD/3V/4Y, the /0Y variant reduces pin count and layout complexity by omitting HVIO5–HVIO8, while maintaining identical CAN FD partial networking, dual LIN, and SMPS performance. Against UJA1169TK/FD/3V0, it trades newer features for broader qualification history and lower unit cost in established platforms.

Availability

UJA1132HW/FD/3V/0Y is available at Aetrix Electronics and suitable for Body Control Modules, Powertrain Control Units, ADAS ECUs, and Electric Power Steering modules requiring stable component supply across automotive production lifecycles.

Supply support for UJA1132HW/FD/3V/0Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in automotive-grade power management and communication ICs.

The UJA113x series was designed specifically for next-generation automotive Electronic Control Units, integrating power regulation, CAN FD/LIN interface, and fail-safe control in a single HTQFP48 package to reduce ECU BOM count and improve system reliability.

FAQ

What is the primary function of the UJA1132HW/FD/3V/0Y in an automotive ECU?

The UJA1132HW/FD/3V/0Y serves as a System Basis Chip that integrates power regulation (3.3 V/500 mA LDO + buck-boost SMPS), HS-CAN transceiver with CAN FD support up to 2 Mbit/s, dual LIN transceivers, battery monitoring, watchdog, and fail-safe outputs. In an automotive ECU, UJA1132HW/FD/3V/0Y directly supplies the microcontroller, manages communication buses, handles wake-up events, and executes limp-home responses - consolidating discrete power and interface functions into one device.

Does the UJA1132HW/FD/3V/0Y support CAN FD communication, and what are its timing limitations?

Yes, the UJA1132HW/FD/3V/0Y supports CAN FD active communication in the data phase up to 2 Mbit/s, validated against ISO 11898-2:201x loop delay symmetry requirements. Its CAN transceiver complies with ISO 11898-2:2003, -5:2007, and -6:2013, and implements CAN FD-passive partial networking - meaning it ignores CAN FD frames in Sleep/Standby mode to prevent spurious wake-ups. The UJA1132HW/FD/3V/0Y does not support CAN FD arbitration phase rates above 1 Mbit/s.

How does the buck-boost SMPS in the UJA1132HW/FD/3V/0Y behave during battery voltage dips?

The buck-boost SMPS in the UJA1132HW/FD/3V/0Y automatically switches to Boost mode when input voltage falls below the regulated output level, enabling continuous operation down to 2 V battery input. This ensures uninterrupted 3.3 V supply to the microcontroller during engine cranking or battery sag events. The SMPS requires only one external coil and capacitors - no additional semiconductors - and supports Pass-through mode for lowest quiescent current when full output current is immediately needed.

What are the key differences between the UJA1132HW/FD/3V/0Y and UJA1132HW/FD/3V/4Y variants?

The UJA1132HW/FD/3V/0Y and UJA1132HW/FD/3V/4Y share identical core functionality - same 3.3 V LDO, CAN FD transceiver, dual LIN, SMPS, and partial networking. The critical difference is HVIO count: /0Y has HVIO1–HVIO4 connected and HVIO5–HVIO8 marked "n.c.", while /4Y connects all eight HVIOs and adds independent supply pins for two HVIO banks. Use UJA1132HW/FD/3V/0Y when only four high-voltage I/Os are required to simplify layout and reduce cost.

Can the UJA1132HW/FD/3V/0Y be used in systems requiring ASIL-B compliance?

Yes, the UJA1132HW/FD/3V/0Y incorporates multiple ASIL-B enablers: Window-mode watchdog with on-chip oscillator, dual-channel battery A/D monitoring with interrupt reporting, overtemperature warning and shutdown, bidirectional RSTN with configurable pulse width, EN safety output, and diagnostic SPI registers. While the device itself is not ISO 26262-certified, its integrated safety mechanisms - documented in NXP's UJA113x safety manual - support systematic development of ASIL-B compliant ECUs such as EPS or BCMs when combined with appropriate software and system-level measures.