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NXP Semiconductors UJA1136HW/3V3Y

Part No.:
UJA1136HW/3V3Y
Manufacturer:
NXP Semiconductors
Category:
Power Management - Specialized
Package:
48-TQFP Exposed Pad
Datasheet:
AetrixUJA1136HW/3V3Y.pdf
Description:
IC TRANSCEIVER
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,500

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Product details

Overview

UJA1136HW/3V3Y from NXP Semiconductors is a buck/boost System Basis Chip (SBC) for automotive ECUs, integrating a 3.3 V/500 mA LDO (V1), ISO 11898-2/6-compliant HS-CAN transceiver supporting CAN FD up to 2 Mbit/s, dual LIN transceivers, and a low-current boost SMPS for microcontroller memory retention down to 2 V battery supply. It features four configurable HVIOs, battery monitoring with 10-bit ADC, watchdog with window/timeout modes, and limp-home outputs for fail-safe operation in engine control modules.

For engineers reviewing the UJA1136HW/3V3Y datasheet, UJA1136HW/3V3Y pinout, UJA1136HW/3V3Y application, or UJA1136HW/3V3Y equivalent, this page delivers verified technical context, exact pin functions, real-world automotive use cases, and validated alternative parts - all grounded in NXP's official UJA113x product data sheet Rev. 2 (2016).

Technical Context

The UJA1136HW/3V3Y implements a dual-mode switched-mode power supply (SMPS) that automatically selects buck or boost operation based on input voltage and load, with boost output current limited to support only volatile memory retention-not full MCU operation. Its CAN transceiver complies fully with ISO 11898-2:201x and ISO 11898-6:2013, enabling partial networking with CAN FD-passive wake-up suppression during Sleep mode.

This variant includes two LIN transceivers (LIN 2.x/SAE J2602 compliant), four HVIOs configurable as high-side/low-side drivers or wake-up inputs, and non-volatile memory for persistent configuration of power-on behavior, limp-home signals, and sleep mode enablement-without requiring external EEPROM.

Key Specifications

Parameter Value and Actual Design Meaning
V1 Output 3.3 V ±2 %, 500 mA max - powers microcontroller core with undervoltage reset at selectable thresholds (default 90 %)
SMPS Mode Buck/boost with single external coil - boost output supports only microcontroller memory retention (not full operation) down to 2 V battery
CAN Data Rate Up to 2 Mbit/s in CAN FD fast phase - meets ISO 11898-2:201x timing symmetry requirements for reliable FD communication
LIN Channels Dual LIN transceivers - compliant with LIN 2.x and SAE J2602, with integrated slave termination and optimized EMC emission
HVIO Count 4 general-purpose high-voltage I/Os - individually configurable as HS/LS drivers or wake-up inputs with open-load/short-circuit diagnostics
ADC Resolution 10-bit battery monitor - measures BAT or BATSENSE with ±300 mV accuracy at 20 V full scale, continuous dual-channel sampling
Package HTQFP48 - 10 mm × 10 mm thermal-enhanced quad flat package with exposed die pad connected to GND for PCB heat dissipation

Pinout & Package

UJA1136HW/3V3Y uses the HTQFP48 package (SOT1181-2), 10 mm × 10 mm × 1.0 mm body with exposed thermal pad internally tied to GND (pins 4 and 23). The pad must be soldered to a PCB ground plane for thermal management.

Pin/Terminal Circuit Role Design Meaning
V1 Main microcontroller supply output 3.3 V regulated output, 500 mA capable, with short-circuit protection and clamp limiting voltage to ≤6 V under reverse current
VCAN CAN transceiver supply 5 V dedicated supply for HS-CAN block - enables independent biasing and isolation from V1 domain
RXDC / TXDC CAN data interface Differential receive/transmit pins connecting to CAN controller; compatible with standard CAN protocol controllers
CANH / CANL CAN bus physical layer Direct connection to vehicle CAN bus lines; compliant with ISO 11898-2 ESD (±6 kV HBM), transient (ISO 7637-3), and short-circuit (±40 V) requirements
RXDL1 / TXDL1
RXDL2 / TXDL2
Dual LIN data interface Two independent LIN channels - each supports LIN 2.x frame handling and slave termination; RXDL2/TXDL2 are functional (not internal-only) in UJA1136HW/3V3Y
HVIO1–HVIO4 Configurable high-voltage I/O Four pins individually settable as high-side drivers (≤24 Ω RDS(on)), low-side drivers, or wake-up inputs with ratiometric threshold and ground-offset tolerance (±2.5 V)
LIMP Limp-home activation output Open-drain output driving external fail-safe hardware; supports static (HVIO2), 100 Hz (HVIO3), or 1.25 Hz (HVIO4) limp-home signals per NVM configuration
SCK / SDO / SDI / SCSN SPI interface 16-/24-/32-bit SPI bus for configuration, status readback, and diagnostic control - supports bidirectional reset and interrupt reporting
INTN1 / INTN2 Interrupt outputs INTN1 reports all events; INTN2 reports only high-priority interrupts (e.g., V1 UV, CAN/LIN fault, overtemperature)
BAT / BATSMPS / BATSENSE Battery sensing and SMPS input BAT supplies LIN transceivers and ADC source 0; BATSMPS feeds SMPS; BATSENSE enables differential battery monitoring across polarity protection diode

Key Features

Feature Design Value
CAN FD-passive partial networking Enables Sleep mode during CAN FD traffic without bus errors - ideal for mixed CAN FD/classic CAN networks where legacy nodes remain dormant
Configurable limp-home outputs Three distinct limp-home signal options (static, 100 Hz, 1.25 Hz) mapped to HVIO2–HVIO4 and stored in NVM - eliminates need for external logic in fail-safe designs
Dual independent LIN transceivers Supports two separate LIN subnetworks (e.g., body control + HVAC) with individual termination and SAE J2602 compliance - reduces BOM count vs. discrete transceivers
Low-current boost SMPS Extends volatile memory retention during cranking dips to 2 V battery - avoids data loss without powering full MCU, reducing quiescent current in Standby
Integrated battery A/D converter 10-bit dual-channel monitor (BAT/BATSENSE) with software-triggered interrupts and shutdown capability - enables precise battery health tracking without external ADC
Non-volatile configuration storage Persists limp-home settings, sleep mode enable/disable, V1 reset thresholds, and HVIO configurations across power cycles - eliminates boot-time initialization overhead

Applications

Engine Control Unit (ECU) Body Control Module (BCM)

Use Scenario: Real-time engine management under wide battery voltage range (6–16 V), including cold-crank conditions below 6 V.

IC Role / Device Role / Timing Role: Central SBC providing regulated 3.3 V power, CAN FD communication, dual LIN for sensor/actuator networks, and fail-safe limp-home signaling during faults.

Use Value: Maintains microcontroller memory integrity via boost SMPS during 2 V cranking dips, while CAN FD-passive prevents spurious wake-ups during high-speed diagnostics.

Use Scenario: Integrated lighting, door lock, and climate control with distributed LIN slaves and centralized CAN gateway functionality.

IC Role / Device Role / Timing Role: Power manager and bus interface hub - supplies multiple subsystems via V1/V2, routes commands between CAN backbone and dual LIN subnets.

Use Value: Dual LIN transceivers eliminate need for two discrete transceivers; HVIOs directly drive LED loads or relays with built-in diagnostics and PWM dimming.

Advanced Driver Assistance Systems (ADAS) Sensor Hub Electric Power Steering (EPS) ECU

Use Scenario: Aggregating radar, camera, and ultrasonic sensor data in a compact module with strict EMC and functional safety requirements.

IC Role / Device Role / Timing Role: Safety-critical power supervisor and communication interface - monitors battery health, enforces safe startup/shutdown sequences, and provides isolated CAN/LIN connectivity.

Use Value: ±6 kV HBM ESD on CAN/LIN pins and ISO 7637-3 transient protection ensure robustness in noisy vehicle environments; watchdog with window mode supports ASIL-B compliance.

Use Scenario: High-reliability steering assist system requiring immediate fail-safe response to MCU faults or power anomalies.

IC Role / Device Role / Timing Role: Fault-tolerant system basis chip - activates mechanical limp-home via LIMP pin and HVIO-driven actuators upon detected overtemperature or V1 undervoltage.

Use Value: Configurable limp-home outputs (1.25 Hz, 50 % duty cycle) provide standardized mechanical feedback signal to steering column hardware without external timers or logic.

Equivalent & Alternatives

The following parts are listed as comparable options for similar System Basis Chip applications.

Alternative Part Technical Difference Application Difference Selection Advice
UJA1132HW/3V3 Higher-current boost SMPS (supports full MCU operation down to 2 V); same pinout and feature set except boost capability Preferred where cranking must sustain full microcontroller execution - not just memory retention Select UJA1132HW/3V3 if boost output must deliver >100 mA continuous current; otherwise UJA1136HW/3V3 offers lower quiescent current in Standby
TLE9471-3ES Infineon SBC with 3.3 V/500 mA LDO, CAN FD transceiver, single LIN, no boost SMPS, but includes embedded voltage supervisor and enhanced watchdog Used in cost-sensitive or space-constrained modules where dual LIN is unnecessary and external boost circuitry is acceptable Choose TLE9471-3ES when footprint or BOM simplification outweighs need for integrated boost and dual LIN; verify external SMPS design for memory retention

Compared with UJA1132HW/3V3, UJA1136HW/3V3 trades boost current capability for lower standby power - making it optimal for memory-retention-only scenarios. Against TLE9471-3ES, UJA1136HW/3V3 provides native dual LIN and integrated boost, reducing external component count despite differing watchdog architecture.

Availability

UJA1136HW/3V3Y is available at Aetrix Electronics and suitable for automotive engine control units, body control modules, ADAS sensor hubs, and electric power steering systems requiring stable component supply, long-term lifecycle assurance, and AEC-Q100 qualified performance.

Supply support for UJA1136HW/3V3Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on automotive, industrial, and IoT applications, delivering secure, energy-efficient, and highly integrated solutions for mission-critical systems.

The UJA113x series is NXP's automotive-grade System Basis Chip family designed specifically for next-generation ECUs requiring integrated power management, CAN FD and dual LIN connectivity, fail-safe diagnostics, and configurable limp-home functionality in compact HTQFP packages.

FAQ

What is the key functional difference between UJA1136HW/3V3Y and UJA1132HW/3V3?

The UJA1136HW/3V3Y features a low-current boost SMPS intended solely for microcontroller memory retention during battery dips down to 2 V, whereas the UJA1132HW/3V3 supports full MCU operation in boost mode with higher output current capability. Both share identical pinout, 3.3 V/500 mA V1 regulator, dual LIN, and CAN FD-passive functionality - making UJA1136HW/3V3Y optimal for lower-quiescent-current applications where full boost power is unnecessary.

Does UJA1136HW/3V3Y support CAN FD communication at 2 Mbit/s in both arbitration and data phases?

The UJA1136HW/3V3Y supports CAN FD up to 2 Mbit/s exclusively in the data phase (fast phase), as confirmed by its compliance with ISO 11898-2:201x timing symmetry requirements. Its classic CAN physical layer operates at up to 1 Mbit/s in arbitration phase. This matches the specification for all UJA113x variants - the transceiver does not support 2 Mbit/s arbitration phase, only data-phase acceleration.

Can the four HVIOs on UJA1136HW/3V3Y be used simultaneously as both drivers and wake-up inputs?

No - each HVIO on UJA1136HW/3V3Y is individually configurable *either* as a high-side/low-side driver *or* as a wake-up input, but not both concurrently. Configuration is performed via SPI register writes and persists in non-volatile memory. Attempting to use one pin for both roles violates the internal state machine and may result in undefined behavior or failure to detect wake events.

Is the boost function of UJA1136HW/3V3Y enabled by default after power-on?

Yes - the SMPS in UJA1136HW/3V3Y operates in automatic buck/boost mode by default after power-on reset. Boost activation occurs dynamically when input voltage falls below the regulated output level and load conditions permit. The mode is transparent to the user; no SPI command is required to enable boost, though Pass-through mode can be selected via SPI to bypass regulation entirely.

What is the purpose of the BATSENSE pin on UJA1136HW/3V3Y, and how does it differ from the BAT pin?

The BATSENSE pin on UJA1136HW/3V3Y enables differential battery voltage measurement across an external polarity protection diode, while BAT provides direct connection to the main battery rail. BAT feeds the LIN transceivers and serves as ADC source 0; BATSENSE serves as ADC source 1, allowing accurate monitoring of true battery voltage even when a series diode introduces forward-drop error - critical for precise undervoltage detection in production ECUs.

UJA1136HW/3V3Y Specifications

Product attributes
Attribute value
Manufacturer:
NXP Semiconductors
Series:
-
Package/Case:
48-TQFP Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Last Time Buy
Applications:
-
Current - Supply:
2.8mA
Voltage - Supply:
2V ~ 28V
Operating Temperature:
-40°C ~ 125°C (TA)
Grade:
Automotive
Qualification:
AEC-Q100
Mounting Type:
Surface Mount
Supplier Device Package:
48-HTQFP (10x10)

UJA1136HW/3V3Y FAQ

1.How can I place an order for UJA1136HW/3V3Y through Aetrix?

Please submit a Request for Quotation (RFQ) for UJA1136HW/3V3Y on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for UJA1136HW/3V3Y reliable?

The price and inventory of UJA1136HW/3V3Y are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for UJA1136HW/3V3Y is usually 5 days.

3.What payment methods are accepted for UJA1136HW/3V3Y?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for UJA1136HW/3V3Y transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for UJA1136HW/3V3Y?

UJA1136HW/3V3Y orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your UJA1136HW/3V3Y order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for UJA1136HW/3V3Y?

For technical support, including UJA1136HW/3V3Y datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your UJA1136HW/3V3Y requirements.

6.How does Aetrix verify that UJA1136HW/3V3Y is sourced from the original manufacturer or authorized distributors?

All UJA1136HW/3V3Y products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that UJA1136HW/3V3Y meets industry standards.

7.What is the process for return or replacement of UJA1136HW/3V3Y?

All UJA1136HW/3V3Y units undergo pre-shipment inspection (PSI). If there is an issue with UJA1136HW/3V3Y, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The UJA1136HW/3V3Y part is unused and in its original packaging.

Return procedure for UJA1136HW/3V3Y:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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