NXP Semiconductors UJA1136HW/5V0Y

Overview

UJA1136HW/5V0Y from NXP Semiconductors is a buck/boost System Basis Chip (SBC) for automotive ECUs, integrating a 5 V/500 mA LDO (V1), dual LIN transceivers, ISO 11898-2/6-compliant HS-CAN transceiver supporting up to 2 Mbit/s CAN FD data fields, and a buck/boost SMPS with single-coil operation. It supplies microcontrollers during battery dips down to 2 V via boost mode and supports limp-home functionality via configurable HVIOs. Used in body control modules requiring fail-safe power management and partial networking.

For engineers reviewing the UJA1136HW/5V0Y datasheet, UJA1136HW/5V0Y pinout, UJA1136HW/5V0Y application, or UJA1136HW/5V0Y equivalent, this page delivers verified specifications, validated pin functions, confirmed automotive use cases, and two rigorously cross-checked alternative parts - all traceable to NXP's official UJA113x series documentation (Rev. 2, 5 July 2016).

Technical Context

The UJA1136HW/5V0Y implements a dual-mode switched-mode power supply that automatically selects buck or boost operation based on input voltage and load, delivering regulated 5 V at up to 500 mA from V1 while maintaining microcontroller memory retention down to 2 V battery input. Its CAN transceiver complies with ISO 11898-2:201x and ISO 11898-6:2013, enabling CAN FD-passive partial networking - allowing sleep-mode operation during CAN FD traffic without bus errors.

It features two LIN transceivers compliant with SAE J2602 and LIN 2.x, an integrated 10-bit A/D converter for dual-channel battery monitoring (BAT/BATSENSE), and four high-voltage I/Os configurable as high-side/low-side drivers or wake-up inputs with open-load and short-circuit diagnostics. All configuration settings - including limp-home timing and power-on behavior - are stored in non-volatile memory.

Key Specifications

Pinout & Package

UJA1136HW/5V0Y is housed in a 48-pin HTQFP48 package (SOT1181-2) with 10 mm × 10 mm footprint, 1.0 mm height, and exposed thermal pad internally tied to GND (pins 4 and 23). The pad must be soldered to PCB ground for thermal performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar System Basis Chip applications.

Compared with UJA1135HW/5V0 and UJA1132HW/5V0, the UJA1136HW/5V0 offers identical core functionality (dual LIN, CAN FD, SMPS, V1/V2 regulation) but trades HVIO count and boost current for reduced silicon area and lower unit cost - making it optimal for mid-tier automotive ECUs where full 8-HVIO capability or high-current boost is unnecessary.

Availability

UJA1136HW/5V0Y is available at Aetrix Electronics and suitable for body control modules, door control units, seat control modules, and roof modules requiring stable component supply, automotive-grade reliability, and long-term lifecycle support.

Supply support for UJA1136HW/5V0Y includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader focused on automotive, industrial, and IoT applications, with deep expertise in secure connectivity, power management, and embedded processing.

The UJA113x product line was designed specifically for next-generation automotive Electronic Control Units, integrating power regulation, CAN/LIN communication, and fail-safe supervision into a single compact package to reduce ECU size, cost, and design complexity.

FAQ

What is the maximum CAN data rate supported by the UJA1136HW/5V0Y?

The UJA1136HW/5V0Y supports CAN FD communication with data rates up to 2 Mbit/s in the data field, meeting ISO 11898-2:201x loop delay symmetry requirements. Its physical layer is fully compliant with ISO 11898-2:2003, -5:2007, and -6:2013, enabling reliable high-speed operation in automotive networks without requiring external signal conditioning.

Does the UJA1136HW/5V0Y support CAN partial networking, and how does it handle CAN FD traffic in Sleep mode?

Yes, the UJA1136HW/5V0Y supports ISO 11898-6:2013-compliant CAN partial networking with CAN FD-passive functionality. In Sleep mode, it ignores CAN FD frames entirely - preventing false wake-ups while allowing classic CAN messages to trigger wake events. This makes UJA1136HW/5V0Y ideal for mixed-protocol networks where legacy nodes coexist with CAN FD gateways.

What are the key differences between the UJA1136HW/5V0Y and UJA1135HW/5V0?

The UJA1136HW/5V0Y and UJA1135HW/5V0 share identical core features - dual LIN, CAN FD transceiver, buck/boost SMPS, and 5 V/500 mA V1 regulator - but differ in HVIO count (4 vs. 8) and associated timer resources. UJA1136HW/5V0Y omits HVIO5–HVIO8 and reduces timer flexibility, resulting in lower cost and smaller die size while retaining full functional compatibility for 4-HVIO applications.

Can the UJA1136HW/5V0Y maintain microcontroller operation during battery voltage drops below 5 V?

Yes - the UJA1136HW/5V0Y's buck/boost SMPS sustains the 5 V V1 output down to battery voltages as low as 2 V, though its boost stage is rated for memory retention only (not full MCU execution). This ensures volatile data preservation during engine cranking or load-dump transients, while the LDO's ±2 % accuracy and reverse-current clamp protect the MCU under injection faults.

How is limp-home functionality implemented on the UJA1136HW/5V0Y?

The UJA1136HW/5V0Y implements limp-home via three dedicated HVIO pins: HVIO2 (static high-side), HVIO3 (100 Hz, 10 % duty cycle), and HVIO4 (1.25 Hz, 50 % duty cycle). These outputs activate automatically during critical failures (e.g., overtemperature, watchdog timeout) and are configurable via non-volatile memory - enabling hardware-level fail-safe responses without MCU involvement.