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Diodes Incorporated ZNBG2000X10TA

Part No.:
ZNBG2000X10TA
Manufacturer:
Diodes Incorporated
Category:
Power Management - Specialized
Package:
10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
Datasheet:
AetrixZNBG2000X10TA.pdf
Description:
IC CTRLR BIAS FET 2STAGE 10-MSOP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:2,224

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Product details

Overview

ZNBG2000X10TA from Zetex plc is a dual-channel GaAs/HEMT FET bias controller in MSOP-10 package, generating a regulated –3 V negative rail from a single 5–12 V supply to bias grounded-source FETs. It provides independent drain voltage regulation (2.2 V per channel), external resistor–set drain current (0–15 mA), and dynamic gate voltage limiting (–3.5 V to +0.7 V) for satellite LNB front-ends.

For engineers reviewing the ZNBG2000X10TA datasheet, ZNBG2000X10TA pinout, ZNBG2000X10TA application, or ZNBG2000X10TA equivalent, key selection criteria include dual-channel drain voltage accuracy (±0.2 V), gate drive voltage clamping range, integrated negative rail generation with only two 47 nF capacitors, and unconditional RF stability with recommended CG/CD decoupling.

Technical Context

The ZNBG2000X10TA integrates two independent bias stages, each featuring an internal oscillator-based negative voltage generator, precision VD reference (2.2 V nominal), and current-sense amplifier driving a gate output stage. Drain current is set by external resistors RCAL1/RCAL2, with typical ID = 10 mA at RCAL = 16 kΩ.

Gate outputs enforce strict voltage limits (–3.5 V to +0.7 V) during all transients, and fault protection shuts down drain supply if the –3 V rail is overloaded or shorted. Stability is guaranteed over –40°C to +80°C when used with 4.7 nF gate and 10 nF drain capacitors.

Key Specifications

ParameterValue and Actual Design Meaning
Supply Voltage5–12 V - supports standard LNB input rails without external regulators
Drain Voltage (per channel)2.2 V ±0.2 V - fixed reference ensures consistent FET operating point across temperature
Negative Rail Output–3 V (typ.) - powers gate bias and may supply auxiliary circuits via CSUB pin
Drain Current Range0–15 mA - set externally per channel with RCAL resistors; 10 mA typical at 16 kΩ
Gate Output Voltage Range–3.5 V to +0.7 V - hard-clamped to prevent FET gate oxide damage during power-up/down
Operating Temperature–40°C to +80°C - qualified for outdoor satellite LNB and PMR base station environments
PackageMSOP-10 - 3 mm × 3 mm footprint enables compact multi-FET biasing on space-constrained PCBs

Pinout & Package

MSOP-10 package (3.0 mm × 3.0 mm, 0.5 mm pitch), thermally enhanced with exposed pad (not electrically connected). Pin 1 marked by dot; pin numbering follows standard MSOP convention (counterclockwise from mark).

Pin/TerminalCircuit RoleDesign Meaning
1 (D1)Drain Output 1Regulated 2.2 V supply to first external FET drain; current-limited under fault
2 (G1)Gate Output 1Active gate driver with –3.5 V to +0.7 V clamp; connects to FET gate
3 (CNB1)Negative Rail Oscillator Cap 1Connects to 47 nF capacitor for internal –3 V generator timing
4 (VCC)Positive Supply InputPrimary 5–12 V input; powers both bias channels and oscillator
5 (D2)Drain Output 2Second independent 2.2 V drain supply; identical regulation to D1
6 (RCAL)Current Set Resistor InputReference node for RCAL1 (ch1) and RCAL2 (ch2); sets both FET currents
7 (G2)Gate Output 2Second gate driver with same voltage clamping as G1
8 (CNB2)Negative Rail Oscillator Cap 2Second terminal of 47 nF timing capacitor; completes oscillator loop
9 (CSUB)Negative Rail Output–3 V supply node; can power external circuitry beyond FET gates
10 (GND)Analog GroundCommon return for VCC, gate drives, and substrate reference

Key Features

FeatureDesign Value
Dual independent FET bias channelsEnables simultaneous biasing of two grounded-source GaAs/HEMT FETs in single LNB module
Integrated –3 V negative rail generatorRequires only two 47 nF capacitors (CNB1/CNB2); eliminates need for external charge pump IC
Programmable drain current per channelSet via external RCAL resistors; 0–15 mA range supports diverse FET IDSS values
Overvoltage and overload protectionGate voltage clamped to –3.5 V/+0.7 V; drain supply disabled if CSUB is shorted or overloaded
RF-stable operationGuaranteed unconditional stability with 4.7 nF gate and 10 nF drain capacitors across –40°C to +80°C

Applications

Satellite Receiver LNBPrivate Mobile Radio (PMR)

Use Scenario: Dual-band C-band LNB with separate low-noise amplifiers for horizontal and vertical polarization.

IC Role / Device Role / Timing Role: Dual-channel FET bias controller providing independent 2.2 V drain and clamped gate drive to two GaAs FETs.

Use Value: Eliminates discrete bias networks, reduces board area by >40%, and ensures matched gain/linearity between polarization paths.

Use Scenario: Portable PMR transceiver front-end requiring stable low-noise receive amplification.

IC Role / Device Role / Timing Role: Single-chip bias solution for HEMT LNA stages operating from battery-derived 7.2 V supply.

Use Value: Maintains FET drain current within ±5% over battery discharge (5–12 V), preserving noise figure and IP3.

Single In Single Out (SISO) C-Band LNBCellular Base Station Low-Noise Amplifier

Use Scenario: Cost-sensitive consumer-grade C-band LNB with minimal BOM count.

IC Role / Device Role / Timing Role: Provides regulated 2.2 V drain and –3 V gate bias using only two 47 nF caps and one RCAL resistor.

Use Value: Reduces external component count to just three passives while meeting ETSI EN 301 130 radiated emission limits.

Use Scenario: Indoor femtocell receiver chain requiring ultra-low phase noise and high linearity.

IC Role / Device Role / Timing Role: Bias controller for cascode HEMT LNAs where gate voltage stability directly impacts OIP3.

Use Value: Gate voltage clamping prevents transient-induced gate leakage, sustaining >35 dBm OIP3 over full temperature range.

Equivalent & Alternatives

The following parts are listed as comparable options for similar FET bias controller applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
ZNBG2001X10TAFixed 2.0 V drain voltage (vs. 2.2 V); otherwise identical pinout, features, and specsOptimized for lower-VP GaAs FETs requiring reduced drain biasSelect when FET datasheet specifies VD ≤ 2.05 V for target ID
MAX2641Single-channel, no integrated negative rail; requires external –3 V supply; 50 mA max drain currentUsed in higher-current LNA designs where discrete bias is acceptableChoose only if dual-channel operation or on-chip –3 V generation is not required

Compared with ZNBG2001X10TA, the ZNBG2000X10TA offers higher drain voltage for improved FET transconductance in high-gain LNB stages; versus MAX2641, it reduces system-level BOM count and layout complexity by integrating both bias channels and negative rail generation.

Availability

ZNBG2000X10TA is available at Aetrix Electronics and suitable for satellite receiver LNBs, private mobile radio (PMR) transceivers, and cellular base station low-noise amplifiers requiring stable component supply and long-term industrial availability.

Supply support for ZNBG2000X10TA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Zetex plc (now part of Diodes Incorporated) was a UK-based analog semiconductor specialist focused on high-performance discrete and analog IC solutions for RF, power management, and signal conditioning.

The ZNBG series belongs to Zetex's RF bias controller product line, designed specifically to simplify and stabilize GaAs/HEMT FET biasing in satellite, wireless infrastructure, and portable communications equipment.

FAQ

What external components are mandatory for basic operation?

The ZNBG2000X10TA requires exactly two 47 nF capacitors (CNB1 and CNB2) for its internal –3 V oscillator, one RCAL resistor to set drain current, plus 4.7 nF gate (CG) and 10 nF drain (CD) decoupling capacitors per FET channel to ensure RF stability. No additional regulators or charge pumps are needed.

Can unused bias channels be left unconnected?

Yes. Unused drain (D1/D2) and gate (G1/G2) pins may be left open-circuit without affecting operation of active channels. However, RCAL must remain connected even if only one channel is used, and CNB1/CNB2/CSUB/GND must always be populated to sustain the negative rail.

How does the device protect external FETs during power-up?

During power-up and power-down transients, the gate outputs are actively clamped to –3.5 V to +0.7 V regardless of supply ramp rate. If the –3 V rail (CSUB) collapses due to overload, the device disables both drain outputs to prevent uncontrolled FET conduction and thermal runaway.

Is the –3 V rail capable of powering circuits other than FET gates?

Yes. The CSUB pin delivers up to 200 µA of –3 V current and may supply auxiliary circuitry such as op-amp bias networks or level-shifters. Operation with loads exceeding 200 µA is not guaranteed per datasheet specifications.

ZNBG2000X10TA Specifications

Product attributes
Attribute value
Manufacturer:
Diodes Incorporated
Series:
-
Package/Case:
10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Applications:
Bias Controller
Current - Supply:
24mA
Voltage - Supply:
5V ~ 12V
Operating Temperature:
-40°C ~ 80°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
10-MSOP

ZNBG2000X10TA FAQ

1.How can I place an order for ZNBG2000X10TA through Aetrix?

Please submit a Request for Quotation (RFQ) for ZNBG2000X10TA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ZNBG2000X10TA reliable?

The price and inventory of ZNBG2000X10TA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ZNBG2000X10TA is usually 5 days.

3.What payment methods are accepted for ZNBG2000X10TA?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ZNBG2000X10TA transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ZNBG2000X10TA?

ZNBG2000X10TA orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ZNBG2000X10TA order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ZNBG2000X10TA?

For technical support, including ZNBG2000X10TA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ZNBG2000X10TA requirements.

6.How does Aetrix verify that ZNBG2000X10TA is sourced from the original manufacturer or authorized distributors?

All ZNBG2000X10TA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ZNBG2000X10TA meets industry standards.

7.What is the process for return or replacement of ZNBG2000X10TA?

All ZNBG2000X10TA units undergo pre-shipment inspection (PSI). If there is an issue with ZNBG2000X10TA, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ZNBG2000X10TA part is unused and in its original packaging.

Return procedure for ZNBG2000X10TA:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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