Diodes Incorporated ZNBG3118JA16TC

Overview

ZNBG3118JA16TC from Diodes Incorporated is a GaAs FET bias controller IC designed for satellite LNB applications, integrating polarization switching (13V/17V detection), 22kHz tone-based band selection, regulated −2.5V negative rail generation, and three-stage drain current control (0–15mA per FET, set by external R_CAL). It powers and protects grounded-source GaAs/HEMT LNAs in universal LNBs operating from 3.3V to 8V supply.

For engineers reviewing the ZNBG3118JA16TC datasheet, ZNBG3118JA16TC pinout, ZNBG3118JA16TC application, or ZNBG3118JA16TC equivalent, key selection criteria include its ASTRA-compliant polarization threshold (14.0–15.5V), 22kHz tone detection with >5kHz noise rejection, shared D1/D2 drain output, QFN16 3×3mm package thermal performance (−40°C to +85°C), and integrated FET gate voltage clamping (−3V max).

Technical Context

The ZNBG3118JA16TC implements a dual-function analog control architecture: a precision voltage detector on VPOL pin (±0.75V threshold tolerance) selects FET1/FET2 for polarization switching, while a dedicated 22kHz square-wave tone detector on FIN pin enables HB/LB outputs for LO band selection. Its internal oscillator drives an on-chip charge pump generating −2.5V at CSUB for gate biasing.

All three FET bias stages feature independent current limiting, gate voltage clamping (−3V to 1.0V), and drain voltage regulation at 2.0V ±0.2V. The LB/HB outputs support three LO configurations-bipolar/MIMIC (−2.5V/0V or V_OSC/0V) and logic-enabled PLL (V_CC/0V)-configured via the LOV pin, with load drive up to 35mA (LB/HB) or 100µA (PLL mode).

Key Specifications

Pinout & Package

Supplied in a thermally enhanced 16-pin QFN package (3mm × 3mm, 0.5mm pitch) with exposed thermal pad (to be connected to CSUB or left floating). Pin 1 marked by dot; top-side marking "ZNBG3118 YYWW" (Year/Week code).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LNB bias controller applications.

Compared with MAX2181AETE+ and STV0903, the ZNBG3118JA16TC uniquely combines triple-FET bias, ASTRA-compliant polarization sensing, and 22kHz tone detection in a single 3×3mm QFN - delivering complete analog LNB control with minimal external components, unlike the single-channel MAX2181A or the full-SoC STV0903.

Availability

ZNBG3118JA16TC is available at Aetrix Electronics and suitable for satellite TV reception systems, universal LNB manufacturing, and DBS infrastructure requiring stable component supply, long-lifecycle availability, and AEC-Q200–aligned reliability.

Supply support for ZNBG3118JA16TC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability power management, signal integrity, and precision analog solutions for consumer, industrial, and communications markets.

The ZNBG series targets satellite LNB subsystems, delivering integrated bias, protection, and control functions to replace multi-component discrete solutions - reducing PCB area, improving thermal stability, and accelerating time-to-market for universal LNB designs.

FAQ

What is the function of the CSUB pin on the ZNBG3118JA16TC?

The CSUB pin provides the regulated −2.5V negative rail used to bias the gates of external GaAs/HEMT FETs. It connects to an external 47nF capacitor that stabilizes the internal charge pump. This node can also power auxiliary low-current circuits, and the exposed thermal pad must be connected to CSUB or left floating - not tied to ground.

How does the ZNBG3118JA16TC handle FET overcurrent or short-circuit conditions?

Each FET bias stage includes a dedicated current limiter and gate voltage clamp that restricts output to −3V maximum under all conditions, including power-up transients. If the internal negative rail is overloaded or shorted, the drain supply to all FETs shuts down automatically to prevent excessive current flow and potential FET destruction.

Can the ZNBG3118JA16TC support both discrete and PLL-based local oscillators in the same design?

Yes - the LOV pin configures the LB and HB outputs for three distinct LO types: grounding LOV enables MIMIC oscillators (−2.5V/0V), applying V_OSC enables discrete bipolar/FET oscillators (V_OSC/0V), and connecting LOV to V_CC configures logic-level outputs (V_CC/0V) compatible with PLL LO enable inputs, all without hardware changes.

What is the recommended value and placement of the RCAL resistor?

The RCAL resistor sets drain current for all three FETs from 0 to 15mA. A 39kΩ resistor yields ~10mA (per DS32049 Rev.2). It must connect directly between RCAL pin and GND, with no series impedance. Layout should minimize trace length and avoid noisy nodes, as RCAL is sensitive to leakage and parasitic capacitance affecting current accuracy.