Diodes Incorporated ZNBG6000Q20TC

Overview

ZNBG6000Q20TC from Zetex (now Diodes Incorporated) is a six-channel GaAs/HEMT FET bias controller in QSOP-20 package, generating regulated -3 V negative rail and 2.2 V drain voltage per stage from a single 5–12 V supply. It sets individual drain currents via two external resistors (RCAL1/RCAL2), supports dynamic FET protection, and operates across -40°C to +70°C for satellite LNB front-end biasing.

For engineers reviewing the ZNBG6000Q20TC datasheet, ZNBG6000Q20TC pinout, ZNBG6000Q20TC application, or ZNBG6000Q20TC equivalent, key selection criteria include multi-FET current programming capability, integrated negative rail generation with oscillator, unconditional RF stability with recommended CG/CD capacitors, and fault-safe gate voltage clamping (-3.5 V to 0.7 V).

Technical Context

The ZNBG6000Q20TC integrates six independent bias stages sharing a common on-chip oscillator-based negative rail generator (−3 V, ~200–800 kHz). Each stage regulates drain voltage to 2.2 V while controlling FET drain current via external RCAL resistors - RCAL1 sets ID for FETs 1 & 4, RCAL2 for FETs 2, 3, 5 & 6 - enabling noise-optimized input stage and gain-optimized subsequent stages.

Gate drive outputs are internally clamped to −3.5 V to 0.7 V under all conditions including power-up/down transients. If the negative rail fails (e.g., short or overload), drain supply shuts down to prevent FET overcurrent. Stability is guaranteed only when external gate (CG = 4.7 nF) and drain (CD = 10 nF) capacitors are installed per stage.

Key Specifications

Pinout & Package

Package: QSOP-20 (8.55 × 3.99 mm, 0.635 mm pitch), surface-mount, lead-free compatible.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar FET bias controller applications.

Compared with MAX2641 and LMX2594EVM, ZNBG6000Q20TC uniquely delivers six-channel, self-contained GaAs/HEMT bias control with integrated −3 V generation and hardware-enforced safety - making it irreplaceable for cost- and space-constrained satellite LNB and PMR receiver designs.

Availability

ZNBG6000Q20TC is available at Aetrix Electronics and suitable for satellite LNB manufacturing, private mobile radio (PMR) receiver modules, and cellular base station front-end assemblies requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for ZNBG6000Q20TC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Zetex plc (acquired by Diodes Incorporated in 2008) was a UK-based analog semiconductor specialist focused on high-performance discrete and integrated solutions for RF, power, and signal conditioning.

The ZNBG series was developed specifically for GaAs/HEMT FET biasing in satellite and wireless infrastructure - prioritizing RF stability, thermal robustness, and minimal external component count in compact QSOP packages.

FAQ

What external components are mandatory for ZNBG6000Q20TC operation?

Four external components are mandatory: two 47 nF capacitors (CNB, CSUB) for the internal oscillator-based negative rail generator, and two calibration resistors (RCAL1, RCAL2) to set drain currents. Gate (CG = 4.7 nF) and drain (CD = 10 nF) capacitors are required per stage for RF stability and noise suppression - omission risks oscillation or degraded noise figure.

Can unused bias channels be left unconnected without affecting others?

Yes. Unused drain (Dx) and gate (Gx) pins may be left open-circuit with no impact on remaining active channels. However, RCAL1 and RCAL2 must remain connected to ground via their respective resistors even if some associated FETs are omitted - this ensures proper current reference and avoids regulation errors in active stages.

How does the ZNBG6000Q20TC protect external FETs during power-up?

During power-up/down transients, internal circuitry enforces strict gate voltage limits: −3.5 V minimum and +0.7 V maximum. This prevents gate oxide stress or forward conduction in depletion-mode GaAs/HEMT FETs. Additionally, if the −3 V rail (CSUB) collapses due to overload, all six drain outputs shut off within microseconds to halt current flow before thermal damage occurs.

Is the −3 V rail on CSUB pin rated for powering external circuitry?

Yes, but with strict limitation: CSUB supplies up to 200 µA total load. It is intended primarily for biasing additional FET gates or low-current analog circuitry (e.g., op-amp references). Loads exceeding 200 µA risk rail collapse, triggering drain shutdown. For higher-current −3 V needs, an external regulator must be used - CSUB is not a general-purpose supply rail.