Alpha & Omega Semiconductor Inc. AOZ8131DI-06
- Part No.:
- AOZ8131DI-06
- Manufacturer:
- Alpha & Omega Semiconductor Inc.
- Category:
- TVS Diodes
- Package:
- 2-XDFN
- Datasheet:
-
AOZ8131DI-06.pdf
- Description:
- TVS DIODE DFN1006
- Quantity:
- Payment:

- Shipping:

Inventory:5,665
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Product details
Overview
AOZ8131DI-06 from Alpha and Omega Semiconductor is an ultra-low-capacitance (1.25 pF), bidirectional TVS diode in a DFN 1006 package, rated for 6.0 V working voltage and ±24 kV IEC 61000-4-2 contact/air ESD protection. It clamps transients to 12 V at 1 A TLP and 25 V at 16 A, enabling robust protection of high-speed data lines such as USB 2.0, HDMI, or touch interfaces in portable electronics.
For engineers reviewing the AOZ8131DI-06 datasheet, pinout, applications, or equivalent options, key selection criteria include its 1.25 pF junction capacitance, bidirectional clamping symmetry, DFN 1006 footprint compatibility, and compliance with IEC 61000-4-2 Level 4 (±15 kV air / ±8 kV contact) and extended ±24 kV ESD ratings.
Technical Context
The AOZ8131DI-06 implements a single monolithic silicon avalanche structure configured as a symmetrical bidirectional TVS, enabling identical clamping behavior for positive and negative transients on a single signal line. Its design targets high-frequency signal integrity preservation via sub-2 pF capacitance and low dynamic resistance (0.85 Ω).
It operates across –40°C to +85°C ambient, with a junction temperature range up to +125°C, and meets IEC 61000-4-4 (EFT ±40 A) and IEC 61000-4-5 (lightning ±4 A) requirements - confirming suitability for industrial-grade transient suppression without signal distortion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Working Voltage (VRWM) | 6.0 V - Ensures no conduction during normal 6 V rail operation, preserving signal DC bias. |
| Junction Capacitance (CJ) | 1.25 pF @ 1 MHz - Minimizes signal attenuation and timing skew on >100 Mbps data lines. |
| Clamping Voltage (VCL) | 12 V @ 1 A TLP - Limits peak stress on downstream ICs during fast transients without latch-up. |
| ESD Rating (IEC 61000-4-2) | ±24 kV contact/air - Exceeds Level 4 requirement, enabling single-device compliance in handheld ESD test plans. |
| Dynamic Resistance (RDYN) | 0.85 Ω - Reduces voltage overshoot under high di/dt events, improving clamping consistency. |
| Package | DFN 1006 (1.0 × 0.6 × 0.5 mm) - Enables placement adjacent to connectors or IC pads in space-constrained mobile PCBs. |
Pinout & Package
AOZ8131DI-06 uses a 2-terminal DFN 1006 package with no exposed pad. Terminals are unmarked but electrically symmetric: Pin 1 and Pin 2 form a bidirectional TVS pair across a single signal line.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 | Anode/Cathode (symmetrical) | Interchangeable terminal; connects to protected signal line (e.g., USB D+ or touchscreen X+). |
| Pin 2 | Anode/Cathode (symmetrical) | Interchangeable terminal; connects to system ground or return path for bidirectional clamping. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional ESD clamping | Identical ±24 kV IEC 61000-4-2 performance enables single-device protection of AC-coupled or differential lines without polarity concerns. |
| Ultra-low 1.25 pF capacitance | Preserves signal rise/fall times on USB 2.0 (480 Mbps) and MIPI D-PHY interfaces without measurable eye diagram degradation. |
| Low 12 V clamping at 1 A | Keeps protected IC I/O pins below absolute maximum ratings during ESD events, reducing failure risk in 3.3 V or 5 V systems. |
| DFN 1006 footprint | Reduces PCB area by >60% vs. SOD-323, enabling placement directly at board edge connectors where transients enter. |
Applications
| USB 2.0 Data Lines | Capacitive Touch Interfaces |
|---|---|
Use Scenario: Protecting D+ and D− lines in smartphone USB ports against repeated plug/unplug ESD events. IC Role / Device Role / Timing Role: Bidirectional transient suppressor placed between connector and USB transceiver, operating transparently during 480 Mbps signaling. Use Value: Prevents gate oxide damage in USB PHY ICs while maintaining <1% signal attenuation due to 1.25 pF capacitance. | Use Scenario: Shielding X+/X− and Y+/Y− traces in smartphone or tablet touchscreens from finger-tip ESD. IC Role / Device Role / Timing Role: Low-capacitance shunt clamp on analog sensor lines, active only during >6 V transients. Use Value: Eliminates false touch triggers and ADC saturation without degrading touch resolution or response latency. |
| Notebook Keyboard/Keypad | Digital Camera Interface |
Use Scenario: ESD protection for mechanical key matrix scan lines exposed to user contact in ultrabooks. IC Role / Device Role / Timing Role: Standoff TVS on row/column lines, conducting only during ±8 kV contact discharge events. Use Value: Maintains <100 nA leakage at 5 V to avoid key ghosting, while clamping spikes to <15 V to protect MCU GPIOs. | Use Scenario: Safeguarding high-speed parallel image data buses (e.g., OV5640 interface) in compact digital cameras. IC Role / Device Role / Timing Role: Signal-line TVS placed at image sensor flex cable entry point to intercept connector-induced transients. Use Value: Enables reliable 25 MHz pixel clock transmission with no added jitter, verified per MIPI D-PHY timing budgets. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar TVS diode applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMAJ6.0A | Unidirectional, DO-214AC package (4.5 × 3.2 mm), 600 W peak power, 600 pF capacitance | Requires separate devices per polarity; unsuitable for high-speed data lines due to capacitance | Select only for low-frequency DC power rail protection where size and speed are not constraints. |
| TPD2E001DRYR | 2-channel unidirectional, DRY (1.6 × 1.6 mm), 12 pF typical capacitance per channel, ±8 kV IEC 61000-4-2 | Higher capacitance limits use to ≤10 Mbps lines; dual-channel reduces component count but increases layout complexity | Prefer for multi-line protection where board space allows and speed <100 Mbps. |
Compared with SMAJ6.0A and TPD2E001DRYR, the AOZ8131DI-06 uniquely delivers bidirectional ±24 kV ESD protection in a 1.0 × 0.6 mm footprint with sub-2 pF capacitance - making it the only viable option for space-constrained, high-speed single-line applications like USB 2.0 or MIPI D-PHY.
Availability
AOZ8131DI-06 is available at Aetrix Electronics and suitable for portable handheld devices, capacitive touch interfaces, and notebook keypad protection requiring stable component supply and RoHS-compliant sourcing.
Supply support for AOZ8131DI-06 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Alpha and Omega Semiconductor (AOS) is a fabless power semiconductor company specializing in MOSFETs, TVS diodes, and power ICs for efficiency-critical applications.
The AOZ8131DI-06 belongs to AOS's ultra-low-capacitance TVS family, engineered specifically for ESD-hardened high-speed signal paths in consumer mobile electronics.
FAQ
What is the maximum clamping voltage of the AOZ8131DI-06 under a 16 A transient?
The AOZ8131DI-06 clamps to 25 V under a 16 A TLP pulse (tp = 100 ns, tr = 1 ns), as specified in the Electrical Characteristics table. This value ensures protected ICs remain within safe operating voltage limits during severe lightning-surge-like events, and is measured across both terminals with symmetrical bidirectional behavior confirmed in the Typical Performance Characteristics section.
Does the AOZ8131DI-06 require orientation during PCB placement?
No - the AOZ8131DI-06 is a fully symmetrical bidirectional device with identical electrical characteristics between Pin 1 and Pin 2. There is no anode/cathode marking or functional polarity; either terminal may connect to the signal line or ground return path without affecting ESD performance or clamping behavior.
What is the guaranteed junction capacitance range for the AOZ8131DI-06?
The AOZ8131DI-06 has a guaranteed junction capacitance of 1.2 pF (min) to 2.0 pF (max) at 0 V bias and 1 MHz, with a typical value of 1.25 pF. This tight specification ensures consistent high-speed signal integrity across production lots, critical for USB 2.0 and MIPI D-PHY compliance validation.
Can the AOZ8131DI-06 replace older TVS diodes like P6KE6.8CA in data line protection?
No - the AOZ8131DI-06 is not a drop-in replacement for P6KE6.8CA. While both are bidirectional TVS diodes, the P6KE6.8CA uses a DO-15 package (5.6 × 3.6 mm) and has ~200 pF capacitance, making it incompatible with high-speed data lines. The AOZ8131DI-06's 1.25 pF and DFN 1006 footprint serve fundamentally different design requirements.
Is the AOZ8131DI-06 compliant with automotive AEC-Q200 standards?
No - the AOZ8131DI-06 is specified for –40°C to +85°C ambient operation and is not qualified to AEC-Q200. Its datasheet lists no automotive qualification testing, and Alpha and Omega Semiconductor explicitly restricts its use to commercial and industrial portable electronics, excluding automotive safety-critical systems per their Life Support Policy.
AOZ8131DI-06 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Alpha & Omega Semiconductor Inc.
- Package/Case:
- 2-XDFN
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- -
- Unidirectional Channels:
- -
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- -
- Voltage - Breakdown (Min):
- -
- Voltage - Clamping (Max) @ Ipp:
- -
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- -
- Applications:
- -
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 2-DFN (1x0.6)
AOZ8131DI-06 FAQ
1.How can I place an order for AOZ8131DI-06 through Aetrix?
Please submit a Request for Quotation (RFQ) for AOZ8131DI-06 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AOZ8131DI-06 reliable?
The price and inventory of AOZ8131DI-06 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AOZ8131DI-06 is usually 5 days.
3.What payment methods are accepted for AOZ8131DI-06?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AOZ8131DI-06 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AOZ8131DI-06?
AOZ8131DI-06 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AOZ8131DI-06 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AOZ8131DI-06?
For technical support, including AOZ8131DI-06 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AOZ8131DI-06 requirements.
6.How does Aetrix verify that AOZ8131DI-06 is sourced from the original manufacturer or authorized distributors?
All AOZ8131DI-06 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AOZ8131DI-06 meets industry standards.
7.What is the process for return or replacement of AOZ8131DI-06?
All AOZ8131DI-06 units undergo pre-shipment inspection (PSI). If there is an issue with AOZ8131DI-06, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AOZ8131DI-06 part is unused and in its original packaging.
Return procedure for AOZ8131DI-06:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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