Toshiba Semiconductor and Storage CSLZ24V,L3F
- Part No.:
- CSLZ24V,L3F
- Manufacturer:
- Toshiba Semiconductor and Storage
- Category:
- TVS Diodes
- Package:
- 2-SMD, No Lead
- Datasheet:
-
CSLZ24V,L3F.pdf
- Description:
- 24V ZNR DIODE SOD-962 OVP
- Quantity:
- Payment:

- Shipping:

Inventory:9,900
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
CSLZ24V,L3F from Toshiba Electronic Devices & Storage Corporation is a silicon epitaxial planar Zener diode designed for transient voltage suppression in low-power signal lines. It delivers 24 V nominal Zener voltage (22.8–25.6 V), 70 Ω dynamic impedance at 5 mA, 34 V clamping voltage under 2.5 A peak pulse current, and 8.5 pF capacitance at 0.5 V reverse bias - enabling ESD and surge protection in USB, I²C, and sensor interfaces.
For engineers reviewing the CSLZ24V,L3F datasheet, CSLZ24V,L3F pinout, CSLZ24V,L3F application, or CSLZ24V,L3F equivalent, key selection criteria include its ±10 kV IEC61000-4-2 contact ESD rating, 117 W peak pulse power per IEC61000-4-5, 150°C junction temperature limit, and SL2 (SOD-323) package compatibility with high-density PCB layouts.
Technical Context
The CSLZ24V,L3F operates as a unidirectional voltage clamp using silicon epitaxial planar Zener technology. Its design targets fast response to transients via low dynamic resistance (1.5 Ω typical) and low junction capacitance (8.5 pF), ensuring minimal signal distortion in data-line protection applications.
It complies with IEC61000-4-2 (ESD) and IEC61000-4-5 (surge) standards, with validated 2.5 A peak pulse current handling and 34 V clamping voltage at that level. Thermal performance is specified for two PCB mounting conditions: 150 mW on 20 mm × 20 mm board and 400 mW on 25.4 mm × 25.4 mm board.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Zener Voltage (VZ) | 22.8–25.6 V min–max at 5 mA; ensures stable reference and clamping near 24 V rail |
| Dynamic Impedance (ZZ) | 70 Ω max at 5 mA; limits voltage deviation during transient conduction |
| Clamp Voltage (VC) | 34 V typical at 2.5 A peak pulse; defines maximum voltage seen by protected circuit |
| Junction Capacitance (Ct) | 8.5 pF typical at 0.5 V, 1 MHz; preserves signal integrity on high-speed lines like I²C |
| ESD Rating | ±10 kV contact per IEC61000-4-2; meets industrial-grade electrostatic immunity requirements |
| Peak Pulse Power | 117 W per IEC61000-4-5 (8/20 μs); sustains short-duration surges without failure |
| Power Dissipation | 150 mW on 20 mm × 20 mm PCB; defines continuous thermal limit in compact layouts |
Pinout & Package
CSLZ24V,L3F uses the SL2 (SOD-323) surface-mount package: 1.7 mm × 1.3 mm × 0.9 mm body, 0.2 mg typical weight, cathode marked with band. Mounting requires standard reflow profile for plastic SMD devices.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (Cathode) | Zener anode connection point | Connected to protected line; conducts during overvoltage to shunt current to ground |
| 2 (Anode) | Zener cathode connection point | Typically tied to system ground or lower-potential rail; completes clamping path |
Key Features
| Feature | Design Value |
|---|---|
| IEC61000-4-2 ESD robustness | ±10 kV contact discharge - eliminates need for external ESD stages in cost-sensitive designs |
| Low dynamic resistance | 1.5 Ω typical - minimizes voltage overshoot during fast transients (e.g., ESD events) |
| Small-form-factor packaging | SOD-323 (SL2) footprint - enables placement adjacent to connectors and IC pins without layout congestion |
| E24-series Zener voltage | 24 V nominal - aligns with common supply rails and simplifies BOM rationalization across voltage grades |
| Low junction capacitance | 8.5 pF - avoids signal degradation on 400 kHz I²C buses and other sub-MHz digital interfaces |
Applications
| USB 2.0 Data Lines | I²C Bus Protection |
|---|---|
Use Scenario: Protecting D+ and D− lines against ESD events during hot-plug insertion of USB peripherals. IC Role / Device Role / Timing Role: Unidirectional Zener clamp placed between data line and ground, conducting only when voltage exceeds 24 V. Use Value: Maintains signal fidelity with 8.5 pF capacitance while suppressing ±10 kV contact ESD per IEC61000-4-2. |
Use Scenario: Safeguarding SDA/SCL lines in microcontroller-based sensor networks exposed to board-level surges. IC Role / Device Role / Timing Role: Low-capacitance transient voltage suppressor connected from each bus line to ground. Use Value: Enables reliable 400 kHz operation with 34 V clamping at 2.5 A, preventing latch-up in I²C transceivers. |
| Industrial Sensor Interfaces | Automotive Body Control Modules |
Use Scenario: Shielding analog and digital outputs of temperature/humidity sensors from induced transients in factory environments. IC Role / Device Role / Timing Role: Zener-based overvoltage limiter on sensor output traces routed near motor drives or relays. Use Value: Withstands 117 W surge pulses per IEC61000-4-5, extending sensor lifetime without adding TVS arrays. |
Use Scenario: Protecting LIN bus or low-speed CAN stub lines in non-safety-critical body electronics (e.g., door modules). IC Role / Device Role / Timing Role: Secondary surge clamp supplementing primary protection on 12 V–24 V supply-derived signal paths. Use Value: Operates up to 150°C junction temperature, supporting under-hood ambient conditions without derating. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Zener-based transient voltage suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NSZ24V3T5G (onsemi) | 24 V nominal, 100 Ω ZZ max, 36 V VC at 2.5 A, SOD-323 package | Higher clamping voltage and impedance reduce precision in low-voltage margin designs | Select when higher surge margin is prioritized over signal integrity on high-speed lines |
| BZX384-B24,115 (Nexperia) | 24 V nominal, 90 Ω ZZ max, 35 V VC at 2.5 A, SOD-323 package, 100 pF Ct | 100 pF capacitance degrades rise time on >100 kHz signals; unsuitable for I²C or USB | Prefer for DC-biased power rail clamping where speed is not critical |
Compared with NSZ24V3T5G and BZX384-B24,115, the CSLZ24V,L3F offers the lowest junction capacitance (8.5 pF) and tightest Zener tolerance (±1.2 V), making it optimal for high-fidelity data-line protection where signal integrity and precise clamping thresholds are essential.
Availability
CSLZ24V,L3F is available at Aetrix Electronics and suitable for USB 2.0 interface protection, I²C bus safeguarding, and industrial sensor signal conditioning requiring stable component supply and consistent parametric performance across production lots.
Supply support for CSLZ24V,L3F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Toshiba Electronic Devices & Storage Corporation designs and manufactures discrete semiconductors, power devices, and logic ICs, with emphasis on reliability, miniaturization, and automotive-grade qualification.
The CSLZ Series was developed specifically for compact, high-reliability transient voltage suppression in space-constrained consumer and industrial electronics, targeting ESD and surge resilience without compromising signal bandwidth.
FAQ
What is the Zener voltage tolerance of CSLZ24V,L3F?
The CSLZ24V,L3F has a Zener voltage range of 22.8 V (min) to 25.6 V (max) at 5 mA test current, corresponding to ±1.2 V deviation from the nominal 24 V rating. This 5% tolerance aligns with E24 series standard values and ensures predictable clamping behavior in 24 V system interfaces.
Does CSLZ24V,L3F meet IEC61000-4-5 surge immunity requirements?
Yes, CSLZ24V,L3F is rated for 117 W peak pulse power per IEC61000-4-5 with 8/20 μs waveform and 2.5 A peak pulse current. Its 34 V clamping voltage at that current level provides verified protection for equipment subjected to line-to-ground surges in industrial environments.
What is the thermal derating behavior of CSLZ24V,L3F above 25°C?
CSLZ24V,L3F's power dissipation must be linearly derated above 25°C ambient: from 150 mW (on 20 mm × 20 mm board) down to zero at 150°C junction temperature. The thermal resistance from junction-to-ambient is not fixed but depends on PCB copper area, per Toshiba's Note 1 and Note 2 in Absolute Maximum Ratings.
Can CSLZ24V,L3F be used for bidirectional ESD protection?
No, CSLZ24V,L3F is a unidirectional Zener diode with cathode-anode polarity. For bidirectional protection (e.g., AC-coupled lines), two CSLZ24V,L3F devices must be connected in series opposition, or a dedicated bidirectional TVS like DF2S7.5MCT be selected instead.
What is the reverse leakage current of CSLZ24V,L3F at rated voltage?
At 19 V reverse bias (0.5 × VZ nominal), CSLZ24V,L3F exhibits ≤0.5 μA reverse current. At 24 V (VZ nominal), leakage remains below 19 μA - low enough to avoid loading on high-impedance sensor outputs or pull-up resistors in I²C applications.
CSLZ24V,L3F Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Toshiba Semiconductor and Storage
- Package/Case:
- 2-SMD, No Lead
- Series:
- CSLZ
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 1
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 19V (Max)
- Voltage - Breakdown (Min):
- 22.8V
- Voltage - Clamping (Max) @ Ipp:
- 34V (Typ)
- Current - Peak Pulse (10/1000µs):
- 2.5A (8/20µs)
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 8.5pF @ 1MHz
- Operating Temperature:
- 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SL2
CSLZ24V,L3F FAQ
1.How can I place an order for CSLZ24V,L3F through Aetrix?
Please submit a Request for Quotation (RFQ) for CSLZ24V,L3F on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CSLZ24V,L3F reliable?
The price and inventory of CSLZ24V,L3F are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CSLZ24V,L3F is usually 5 days.
3.What payment methods are accepted for CSLZ24V,L3F?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CSLZ24V,L3F transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CSLZ24V,L3F?
CSLZ24V,L3F orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CSLZ24V,L3F order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CSLZ24V,L3F?
For technical support, including CSLZ24V,L3F datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CSLZ24V,L3F requirements.
6.How does Aetrix verify that CSLZ24V,L3F is sourced from the original manufacturer or authorized distributors?
All CSLZ24V,L3F products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CSLZ24V,L3F meets industry standards.
7.What is the process for return or replacement of CSLZ24V,L3F?
All CSLZ24V,L3F units undergo pre-shipment inspection (PSI). If there is an issue with CSLZ24V,L3F, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CSLZ24V,L3F part is unused and in its original packaging.
Return procedure for CSLZ24V,L3F:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CSLZ24V,L3F Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

