onsemi CSPESD304G-HST
- Part No.:
- CSPESD304G-HST
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- 5-UFBGA, WLCSP
- Datasheet:
-
CSPESD304G-HST.pdf
- Description:
- TVS DIODE 15VC 5CSP
- Quantity:
- Payment:

- Shipping:

Inventory:7,972
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Product details
Overview
CSPESD304G-HST from onsemi is a quad-channel ESD protection diode array in a 5-bump WLCSP package (0.96 mm × 1.33 mm), rated for ±15 kV IEC 61000−4−2 contact discharge and ±30 kV HBM ESD suppression, with 22–32 pF diode capacitance and 5.5 V reverse breakdown voltage. It serves as low-inductance I/O port protection for high-speed data lines in portable electronics.
For engineers reviewing the CSPESD304G-HST datasheet, pinout, applications, or equivalent options, key selection criteria include channel count, clamping voltage under 8 kV HBM stress (+15 V / −8 V), leakage current ≤100 nA at 3.3 V, and compatibility with non-solder-mask-defined PCB pads per CASE 567AY mechanical outline.
Technical Context
The CSPESD304G-HST integrates four independent bidirectional ESD protection diodes tied to a common GND terminal, each configured as a low-capacitance silicon avalanche structure optimized for fast transient response. Its design targets signal integrity preservation on high-frequency interfaces such as USB 2.0, HDMI, and keypad lines.
It operates across −40°C to +85°C, supports DC power dissipation up to 200 mW, and achieves clamping during ESD events via low-impedance conduction paths that activate at 5.5 V reverse breakdown - enabling robust protection without signal distortion in 3.3 V and 5 V systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ESD Rating (IEC 61000−4−2) | ±15 kV contact discharge - meets Level 4 immunity for handheld device I/O ports |
| ESD Rating (HBM) | ±30 kV - exceeds MIL−STD−883 Method 3015 requirement for board-level handling |
| Clamping Voltage (8 kV HBM) | +15 V / −8 V - limits transient overvoltage to safe levels for 3.3 V logic receivers |
| Diode Capacitance | 22–32 pF at 2.5 V reverse bias - enables use on USB 2.0 (480 Mbps) and audio lines without signal degradation |
| Reverse Breakdown Voltage | 5.5 V min - ensures reliable turn-on before damage threshold of typical 3.3 V/5 V ICs |
| Leakage Current | ≤100 nA at 3.3 V - prevents measurable loading on high-impedance sensor or analog inputs |
Pinout & Package
Package: WLCSP5 (CASE 567AY), 5-bump chip-scale package, 0.96 mm × 1.33 mm footprint, lead-free, RoHS-compliant, solder balls with SnAgCu alloy.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1 | ESD_1 | Channel 1 anode/cathode node - connects to protected signal line 1 (e.g., USB D+) |
| A3 | ESD_2 | Channel 2 anode/cathode node - connects to protected signal line 2 (e.g., USB D−) |
| B2 | GND | Common cathode reference - must be low-inductance connection to system ground plane |
| C1 | ESD_3 | Channel 3 anode/cathode node - connects to protected signal line 3 (e.g., keypad row) |
| C3 | ESD_4 | Channel 4 anode/cathode node - connects to protected signal line 4 (e.g., keypad column) |
Key Features
| Feature | Design Value |
|---|---|
| Quad-channel monolithic integration | Four matched ESD diodes in single die - eliminates inter-device timing skew and layout mismatch |
| Ultra-low lead inductance | Chip-scale bump interconnect - reduces inductive voltage overshoot during sub-nanosecond ESD transients |
| Low-profile WLCSP packaging | 0.56 mm max height - enables placement under connectors or beneath tight-fitting shields in slim mobile devices |
| Pb-free and RoHS-compliant construction | SnAgCu solder balls - compatible with lead-free reflow profiles up to 260°C peak temperature |
Applications
| USB 2.0 Interface Protection | Keypad/Button Circuit Protection |
|---|---|
Use Scenario: Protecting differential data lines (D+, D−) of USB 2.0 ports in smartphones and tablets against user-handling ESD events. IC Role / Device Role / Timing Role: Bidirectional transient voltage suppressor placed directly at connector entry point, before series impedance or EMI filters. Use Value: 22–32 pF capacitance avoids signal integrity loss at 480 Mbps; ±15 kV IEC rating ensures compliance with IEC 61000−4−2 Level 4. | Use Scenario: Shielding mechanical keypad matrix rows/columns in handheld PCs and PDAs from ESD-induced latch-up or GPIO damage. IC Role / Device Role / Timing Role: Four-channel clamp protecting four independent low-voltage digital I/O lines tied to microcontroller GPIOs. Use Value: Common-GND architecture simplifies PCB routing; ±30 kV HBM withstand enables robustness during manufacturing and field handling. |
| MP3 Player Audio Line Protection | Notebook Touchpad Interface |
Use Scenario: Guarding stereo headphone output or microphone input traces in portable audio players against pocket-discharge ESD. IC Role / Device Role / Timing Role: Low-capacitance shunt protector on analog signal paths, minimizing insertion loss and THD impact. Use Value: 100 nA leakage preserves DC bias stability; 5.5 V breakdown avoids clipping of 3.3 V audio codec outputs. | Use Scenario: Securing I²C or PS/2 interface lines between notebook touchpad controller and host EC or embedded controller. IC Role / Device Role / Timing Role: ESD clamp on bidirectional clock/data lines operating at ≤400 kHz, with minimal capacitive loading. Use Value: Clamping voltage (+15 V / −8 V) stays within absolute maximum ratings of touchpad ICs; compact CSP fits near connector edge. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD4E001DRYR | 4-channel, 12 pF typical capacitance, 5.5 V breakdown, ±12 kV IEC rating | Lower capacitance suits higher-speed interfaces (e.g., USB 3.0 Gen1), but reduced ESD margin vs. CSPESD304G-HST | Select when signal bandwidth >1 GHz required and ±12 kV IEC suffices |
| ESD5V3U2U-2/TR | 4-channel, 35 pF typical capacitance, 5.3 V breakdown, ±15 kV IEC rating | Higher capacitance limits use to <100 Mbps interfaces; larger SOT-553 package increases board area | Select when cost sensitivity outweighs size constraints and lower speed is acceptable |
Compared with TPD4E001DRYR and ESD5V3U2U-2/TR, the CSPESD304G-HST delivers superior ESD margin (±15 kV IEC, ±30 kV HBM) in the smallest footprint (0.96 × 1.33 mm), making it optimal for space-constrained portable designs where full Level 4 compliance is mandatory.
Availability
CSPESD304G-HST is available at Aetrix Electronics and suitable for USB 2.0 interface protection, keypad/button circuit hardening, and MP3 player audio line safeguarding requiring stable component supply and long-term lifecycle support.
Supply support for CSPESD304G-HST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier delivering energy-efficient, intelligent power and sensing solutions for automotive, industrial, cloud, medical, and portable electronics.
The CSPESD304G-HST belongs to onsemi's OptiGuard® ESD protection product line, engineered specifically for ultra-compact, high-reliability transient suppression in battery-powered consumer devices.
FAQ
What is the maximum operating temperature range for the CSPESD304G-HST?
The CSPESD304G-HST is specified to operate reliably from −40°C to +85°C, matching standard industrial temperature requirements for portable electronics. This range is validated per Table 3 of the official datasheet and applies to all electrical characteristics including leakage current, clamping voltage, and ESD withstand performance. The CSPESD304G-HST maintains its ±15 kV IEC 61000−4−2 rating across this full range.
Does the CSPESD304G-HST require external components to function as an ESD protector?
No, the CSPESD304G-HST functions as a standalone ESD protection device and requires no external resistors, capacitors, or TVS diodes. It is designed for direct placement between protected signal lines and system ground. However, for EMI filtering, the datasheet notes it can be used with external series resistance - but that configuration is optional and not needed for basic ESD suppression.
What is the recommended PCB pad layout for the CSPESD304G-HST?
The CSPESD304G-HST requires non-solder-mask-defined (NSMD) round pads of 0.240 mm diameter, with a 0.290 mm solder mask opening and 0.300 mm laser-cut stencil aperture. These dimensions are defined in the mechanical drawing CASE 567AY and ensure coplanarity control and reliable solder joint formation for its five SnAgCu solder balls. Deviation may cause tombstoning or insufficient wetting.
How does the CSPESD304G-HST achieve ±30 kV HBM ESD protection?
The CSPESD304G-HST achieves ±30 kV HBM protection through optimized silicon junction design and low-inductance WLCSP packaging. Its internal avalanche diodes trigger rapidly at 5.5 V reverse breakdown, clamping transients before damaging downstream ICs. The 5-bump layout minimizes parasitic inductance, preventing voltage overshoot during the fast rise-time (≤1 ns) of HBM pulses - a capability verified per MIL−STD−883 Method 3015.
Is the CSPESD304G-HST compatible with lead-free reflow processes?
Yes, the CSPESD304G-HST uses SnAgCu solder balls and is qualified for lead-free reflow with a peak temperature of 260°C, as specified in the "Lead−free (SnAgCu) Solder Ball Reflow Profile" figure. Its maximum dwell time above liquidus is 60 seconds, and it complies with JEDEC J-STD-020 moisture sensitivity level (MSL) requirements. The device must be stored and handled per MSL-1 guidelines prior to assembly.
CSPESD304G-HST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- 5-UFBGA, WLCSP
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Zener
- Unidirectional Channels:
- 4
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- -
- Voltage - Breakdown (Min):
- 5.5V
- Voltage - Clamping (Max) @ Ipp:
- 15V
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
CSPESD304G-HST FAQ
1.How can I place an order for CSPESD304G-HST through Aetrix?
Please submit a Request for Quotation (RFQ) for CSPESD304G-HST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for CSPESD304G-HST reliable?
The price and inventory of CSPESD304G-HST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for CSPESD304G-HST is usually 5 days.
3.What payment methods are accepted for CSPESD304G-HST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for CSPESD304G-HST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for CSPESD304G-HST?
CSPESD304G-HST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your CSPESD304G-HST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for CSPESD304G-HST?
For technical support, including CSPESD304G-HST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your CSPESD304G-HST requirements.
6.How does Aetrix verify that CSPESD304G-HST is sourced from the original manufacturer or authorized distributors?
All CSPESD304G-HST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that CSPESD304G-HST meets industry standards.
7.What is the process for return or replacement of CSPESD304G-HST?
All CSPESD304G-HST units undergo pre-shipment inspection (PSI). If there is an issue with CSPESD304G-HST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The CSPESD304G-HST part is unused and in its original packaging.
Return procedure for CSPESD304G-HST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
CSPESD304G-HST Tags

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ESD9B5.0ST5G
onsemi

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DESD3V3E1BL-7B
Diodes Incorporated

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ESD5Z3.3T1G
onsemi

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D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

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D5V0L1B2WS-7
Diodes Incorporated
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