Diodes Incorporated D3V3M1U2S9-7
- Part No.:
- D3V3M1U2S9-7
- Manufacturer:
- Diodes Incorporated
- Category:
- TVS Diodes
- Package:
- SOD-923
- Datasheet:
-
D3V3M1U2S9-7.pdf
- Description:
- TVS DIODE 3.3VWM 10VC SOD923
- Quantity:
- Payment:

- Shipping:

Inventory:255,336
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
D3V3M1U2S9-7 from Diodes Incorporated is a unidirectional transient voltage suppression (TVS) diode designed for ESD protection of 3.3V signal lines. It features a 3.3V reverse standoff voltage (VRWM), 5.0V minimum breakdown voltage (VBR), 12A peak pulse current (IPP), 70pF typical input capacitance (Cin), and meets IEC 61000-4-2 ±30kV air/contact discharge requirements - ideal for high-speed data lines in portable consumer electronics.
For engineers reviewing the D3V3M1U2S9-7 datasheet, D3V3M1U2S9-7 pinout, D3V3M1U2S9-7 application, or D3V3M1U2S9-7 equivalent, this device delivers low-capacitance, single-channel ESD clamping with SOD923 footprint compatibility, critical for USB 2.0, HDMI, SD card, and audio interface protection where signal integrity and board space are constrained.
Technical Context
This TVS diode operates as a unidirectional clamping device, triggered when reverse voltage exceeds 5.0V (VBR min), limiting transient energy to ≤10V at 12A (VCL max) under 8/20µs surge conditions. Its 70pF capacitance ensures minimal signal distortion on high-frequency interfaces up to ~200MHz.
Thermal design relies on FR-4 PCB mounting per AP02001 layout, delivering 250mW steady-state power dissipation and 500°C/W junction-to-ambient thermal resistance. Derating begins above +25°C ambient, maintaining ≥50% peak power capability up to +125°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VRWM | 3.3V - Maximum continuous reverse operating voltage before clamping initiates; matches 3.3V I/O rail systems without leakage or false triggering. |
| VBR (min) | 5.0V @ 1mA - Ensures reliable turn-on during ESD events while avoiding premature conduction during normal 3.3V signal swings. |
| VCL @ 12A | 10V @ 8/20µs - Clamps transients to safe levels below IC absolute maximum ratings for downstream 3.3V logic. |
| Cin (typ) | 70pF @ 0V, 1MHz - Enables use on USB 2.0 (480Mbps) and SDIO interfaces without measurable signal rise-time degradation. |
| ESD Rating | ±30kV contact/air (IEC 61000-4-2) - Exceeds industrial and consumer immunity requirements for handheld device touch surfaces and connectors. |
| Package | SOD923 - 0.90 × 0.40 × 0.60 mm surface-mount package enabling ultra-compact placement adjacent to connectors or IC pins. |
Pinout & Package
Package: SOD923 - ultra-small plastic molded case (0.90mm × 0.40mm × 0.60mm), matte tin-plated alloy 42 leadframe, RoHS-compliant, halogen-free, moisture sensitivity level 1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 (Cathode) | Anode connection for unidirectional clamping path | Connected to protected signal line; cathode ties to 3.3V rail or ground depending on polarity configuration - here used as cathode-to-rail for positive transient suppression. |
| Pin 2 (Anode) | Reference node (ground or supply) | Typically connected to system ground to complete clamping path; enables low-impedance discharge of ESD current away from sensitive circuitry. |
Key Features
| Feature | Design Value |
|---|---|
| IEC 61000-4-2 ±30kV ESD protection | Validated clamping performance against worst-case human-body model surges - eliminates need for external ESD test margining in final product validation. |
| 70pF channel capacitance | Preserves signal edge rate on 480Mbps USB 2.0 differential pairs; measured at 0V bias and 1MHz - directly supports high-speed interface compliance. |
| Unidirectional operation | Blocks reverse leakage (<2.0µA at 3.3V) while allowing forward-biased DC bias paths - suitable for data lines referenced to VCC rather than ground. |
| SOD923 footprint | 0.90 × 0.40 mm body enables placement within 0.3mm of micro-B USB or microSD card connectors - reduces PCB trace inductance and improves ESD path effectiveness. |
Applications
| USB 2.0 Data Lines | MicroSD Card Interfaces |
|---|---|
Use Scenario: Protecting D+ and D− lines in smartphone USB OTG circuits exposed to frequent plug/unplug and pocket ESD events. IC Role / Device Role / Timing Role: Unidirectional TVS clamp placed between connector and PHY, referenced to 3.3V rail to suppress positive transients. Use Value: 70pF capacitance avoids USB 2.0 eye diagram closure; ±30kV rating ensures pass/fail compliance without additional shielding or layout redesign. |
Use Scenario: Shielding SDIO command/data lines (CMD, DAT0–DAT3) in portable media players from ESD during card insertion/removal. IC Role / Device Role / Timing Role: Single-channel TVS per line, anode grounded, cathode tied to signal - clamps fast-rising transients before they reach controller GPIOs. Use Value: 5.0V VBR ensures no conduction during 3.3V logic high states; 10V clamping at 12A prevents latch-up in SD host controllers. |
| HDMI CEC/HEAC Lines | Smartphone Audio Jacks |
Use Scenario: Safeguarding HDMI CEC (Consumer Electronics Control) and HEAC (HDMI Ethernet Channel) auxiliary lines in portable projectors and docking stations. IC Role / Device Role / Timing Role: Low-capacitance unidirectional clamp on bidirectional 3.3V control lines, cathode connected to 3.3V rail. Use Value: Sub-100pF Cin preserves CEC timing margins (max 400ns rise time); 3.3V VRWM aligns with HDMI spec's auxiliary voltage domain. |
Use Scenario: ESD protection for 3.5mm TRRS audio jack MIC and HP_L/HP_R lines in smartphones subjected to repeated cable insertion and static discharge. IC Role / Device Role / Timing Role: One D3V3M1U2S9-7 per analog signal line, configured cathode-to-VCC to handle both positive and negative transients via rail-clamping topology. Use Value: 12A IPP handles multi-kV ESD pulses without degradation; 0.001g mass minimizes mechanical stress on fine-pitch solder joints near jack mounting points. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar unidirectional TVS diode applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMAJ3.3A | DO-214AC package (4.5 × 2.7 mm), 100pF Cin, 13.3V VBR min, 100W PPP | Higher capacitance and larger footprint limit use on >100Mbps interfaces; better suited for power-rail or lower-speed I/O. | Select when board space allows larger package and higher clamping voltage is acceptable for non-high-speed lines. |
| TPD2E001DRYR | 2-channel, 15pF Cin per channel, 5.5V VBR, SC-70-6 package, integrated dual-line protection | Offers dual-line integration but requires separate ground return; optimized for space-constrained dual-signal paths like I²C. | Prefer for multi-line interfaces needing matched capacitance and shared footprint; not drop-in for single-line replacement. |
Compared with SMAJ3.3A and TPD2E001DRYR, D3V3M1U2S9-7 uniquely balances ultra-low capacitance (70pF), miniature SOD923 size, and 3.3V system alignment - making it optimal for single-line, high-speed, space-limited portable designs where discrete per-line protection is required.
Availability
D3V3M1U2S9-7 is available at Aetrix Electronics and suitable for USB 2.0 interface protection, microSD card slot hardening, and smartphone audio jack ESD mitigation requiring stable component supply across high-volume consumer electronics production.
Supply support for D3V3M1U2S9-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability, energy-efficient components for consumer, computing, and industrial markets.
D3V3M1U2S9-7 belongs to Diodes' TVS Diode portfolio targeting portable electronics - engineered specifically for low-capacitance, ultra-miniature ESD protection of high-speed 3.3V data interfaces.
FAQ
What is the recommended PCB layout for D3V3M1U2S9-7 to ensure optimal ESD performance?
Use Diodes' AP02001 suggested pad layout: 0.3mm solder mask opening, 0.25mm copper pad width, and direct ground plane connection under the device. Minimize trace length between the TVS anode and system ground to <2mm; place the device within 3mm of the protected connector. Avoid vias in the clamping path to reduce inductance.
Can D3V3M1U2S9-7 be used for bidirectional signal lines like I²C?
No - D3V3M1U2S9-7 is unidirectional and only clamps positive transients when cathode is tied to VCC. For bidirectional lines such as I²C, a bidirectional TVS (e.g., D3V3M1B2S9-7) or dual-diode array is required to protect both positive and negative excursions relative to ground.
How does the 70pF capacitance impact USB 2.0 signal integrity?
At 70pF, D3V3M1U2S9-7 adds <1% loading to standard 90Ω differential USB 2.0 traces, resulting in <0.5dB insertion loss at 240MHz and negligible eye diagram degradation. Measured rise-time increase is <50ps - well within USB 2.0 specification limits (≤1.5ns).
Is D3V3M1U2S9-7 compliant with automotive AEC-Q200?
No - D3V3M1U2S9-7 is not AEC-Q200 qualified. It is rated for -65°C to +150°C operating temperature but lacks the stress testing, failure analysis, and qualification documentation required for automotive applications. For AEC-Q200 TVS diodes, consider Diodes' D3V3M1U2S9Q-7 variant.
D3V3M1U2S9-7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Package/Case:
- SOD-923
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 1
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 3.3V (Max)
- Voltage - Breakdown (Min):
- 5V
- Voltage - Clamping (Max) @ Ipp:
- 10V
- Current - Peak Pulse (10/1000µs):
- 12A (8/20µs)
- Power - Peak Pulse:
- 120W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 70pF @ 1MHz
- Operating Temperature:
- -65°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOD-923
D3V3M1U2S9-7 FAQ
1.How can I place an order for D3V3M1U2S9-7 through Aetrix?
Please submit a Request for Quotation (RFQ) for D3V3M1U2S9-7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for D3V3M1U2S9-7 reliable?
The price and inventory of D3V3M1U2S9-7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for D3V3M1U2S9-7 is usually 5 days.
3.What payment methods are accepted for D3V3M1U2S9-7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for D3V3M1U2S9-7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for D3V3M1U2S9-7?
D3V3M1U2S9-7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your D3V3M1U2S9-7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for D3V3M1U2S9-7?
For technical support, including D3V3M1U2S9-7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your D3V3M1U2S9-7 requirements.
6.How does Aetrix verify that D3V3M1U2S9-7 is sourced from the original manufacturer or authorized distributors?
All D3V3M1U2S9-7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that D3V3M1U2S9-7 meets industry standards.
7.What is the process for return or replacement of D3V3M1U2S9-7?
All D3V3M1U2S9-7 units undergo pre-shipment inspection (PSI). If there is an issue with D3V3M1U2S9-7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The D3V3M1U2S9-7 part is unused and in its original packaging.
Return procedure for D3V3M1U2S9-7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
D3V3M1U2S9-7 Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

