Diodes Incorporated DLPA004-7
- Part No.:
- DLPA004-7
- Manufacturer:
- Diodes Incorporated
- Category:
- TVS Diodes
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
DLPA004-7.pdf
- Description:
- TVS DIODE 85VWM SOT363
- Quantity:
- Payment:

- Shipping:

Inventory:3,029
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Product details
Overview
DLPA004-7 from Diodes Incorporated is a 3-channel bidirectional ESD protection diode array designed for high-speed data bus lines (e.g., USB, HDMI, LVDS), featuring ±15kV IEC 61000-4-2 contact and ±25kV air discharge ESD immunity, 85V reverse standoff voltage, 2pF typical capacitance per channel, and SOT-363 package.
For engineers reviewing the DLPA004-7 datasheet, DLPA004-7 pinout, DLPA004-7 application, or DLPA004-7 equivalent, key selection criteria include low clamping voltage under transient stress, sub-2pF line-to-line capacitance for signal integrity in >1Gbps interfaces, thermal derating above 75°C ambient, and compatibility with automated SMT assembly on FR-4 PCBs with 1"×1" copper pads.
Technical Context
The DLPA004-7 integrates three independent bidirectional TVS diodes in a single SOT-363 package, each configured as a back-to-back Zener pair to clamp both positive and negative transients without polarity dependence. It targets high-speed differential and single-ended data lines where low capacitance and fast response (<3.0μs reverse recovery) are mandatory.
Its 85V VRWM rating supports 24V industrial buses and 3.3V/5V logic interfaces with margin, while leakage remains ≤2.5μA at 70V and 25°C - critical for battery-powered sensor nodes. The device operates from −55°C to +150°C and meets JEDEC high-reliability standards.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VRWM | 85 V - Ensures reliable blocking of 24V nominal bus voltages with 3.5× safety margin against ESD-induced overshoot |
| CT (per element) | 2 pF - Enables use in USB 2.0 (480Mbps) and HDMI 1.4 (3.4Gbps) without signal degradation |
| CLL (DL1–DL2) | 1.6–2.0 pF - Minimizes crosstalk between adjacent differential pairs in compact routing layouts |
| IFSM (1μs) | 4.0 A - Withstands short-duration ESD pulses per IEC 61000-4-2 without parametric shift |
| VF @ 10mA | 0.90 V - Low forward drop reduces DC power loss and self-heating during sustained fault conditions |
| RθJA | 625 °C/W - Requires thermal pad or copper pour for continuous operation above 75°C ambient |
Pinout & Package
SOT-363 (SC-70-6) package: 6-pin ultra-small surface-mount outline with 0.65mm pitch; molded green compound (UL 94V-0), moisture sensitivity level 1, matte tin-plated terminals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | I/O (Channel 1) | ESD-protected data line input/output - connects directly to high-speed trace without series resistor |
| 2 | VN (Negative Rail) | Common cathode connection for all three channels - must be tied to system ground or negative supply |
| 3 | I/O (Channel 2) | Second protected data line - electrically isolated from Pin 1 but shares VN and VP |
| 4 | VP (Positive Rail) | Common anode connection - ties to VCC or floating for bidirectional clamping only |
| 5 | I/O (Channel 3) | Third protected data line - enables triple-line protection (e.g., USB D+, D−, ID) in one footprint |
| 6 | N/C | No internal connection - left unconnected; not usable as thermal pad or auxiliary terminal |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional ESD clamping | Clamps ±15kV contact / ±25kV air transients symmetrically without polarity biasing |
| Low inter-line capacitance | 1.6–2.0pF between data lines preserves differential impedance and eye diagram integrity |
| High-temperature operation | Rated for −55°C to +150°C junction temperature - suitable for under-hood automotive modules |
| Lead-free & halogen-free | Meets RoHS 3 (2015/863/EU) and "Green" definition: Br+Cl <1500ppm, Sb <1000ppm |
Applications
| USB 2.0 Interface Protection | HDMI 1.4 Data Lane Protection |
|---|---|
Use Scenario: Protecting USB host controller D+ and D− lines from ESD events during hot-plug insertion in industrial HMIs. IC Role / Device Role / Timing Role: Bidirectional transient suppressor placed within 5mm of connector, clamping transients before reaching PHY. Use Value: 2pF per channel prevents signal rise-time degradation beyond USB 2.0 spec (≤1.5ns), maintaining full 480Mbps throughput. | Use Scenario: Shielding HDMI source TX lanes (TMDS+ and TMDS−) in set-top boxes exposed to user-handling ESD. IC Role / Device Role / Timing Role: Low-capacitance array protecting two differential pairs plus CEC line in single SOT-363 footprint. Use Value: 1.6pF line-to-line capacitance limits skew between TMDS pairs to <0.1UI, preserving HDMI 1.4 eye opening. |
| Automotive LIN Bus Node | Industrial RS-485 Transceiver I/O |
Use Scenario: ESD hardening of LIN slave node transceiver pins in body control modules operating at 125°C ambient. IC Role / Device Role / Timing Role: Standoff-rated protector (85V VRWM) placed at connector interface to absorb load-dump coupled transients. Use Value: Operation up to +150°C junction enables placement near engine bay connectors without derating loss. | Use Scenario: Protecting RS-485 half-duplex transceiver A/B lines in factory automation gateways with 24V supply rails. IC Role / Device Role / Timing Role: Dual-channel suppressor handling differential ESD injection while maintaining common-mode rejection. Use Value: 85V working voltage exceeds RS-485 ±12V common-mode range by >7×, preventing false triggering during bus faults. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD2E001DRYR | Single-channel, 1.5pF CT, 5V VRWM, SOT-553 | Limited to low-voltage (≤5.5V) interfaces like I²C; insufficient for 24V buses | Select when protecting only 3.3V GPIO with strict capacitance budget (<1.5pF) |
| SP3012-02UTG | 2-channel, 0.35pF CLL, 12V VRWM, SOT-23-6 | Optimized for USB 3.0 (5Gbps); too low VRWM for industrial 24V signaling | Prefer for SuperSpeed USB where sub-0.4pF inter-pair capacitance is mandatory |
Compared with TPD2E001DRYR and SP3012-02UTG, DLPA004-7 uniquely balances 85V standoff, triple-channel integration, and 1.6–2.0pF line-to-line capacitance - making it the only option qualified for combined 24V bus + high-speed data protection in space-constrained SOT-363 layouts.
Availability
DLPA004-7 is available at Aetrix Electronics and suitable for USB 2.0 interface protection, HDMI 1.4 data lane hardening, and automotive LIN bus node designs requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for DLPA004-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability protection, power management, and signal integrity solutions for industrial, automotive, and consumer markets.
The DLPA004-7 belongs to Diodes' transient voltage suppression (TVS) diode array product line, engineered specifically for high-speed data interface protection where low capacitance, precise clamping, and AEC-Q-compliant reliability are required.
FAQ
What is the maximum recommended trace length between DLPA004-7 and the protected connector?
Trace length should not exceed 5 mm from the protected I/O pin to the DLPA004-7 anode/cathode terminals. Longer traces introduce inductance that degrades ESD clamping performance, especially for fast-rising transients. Layout best practice requires direct routing from connector pads to device pins with no vias or stubs.
Can DLPA004-7 be used to protect a 3.3V PCIe Gen1 lane?
No - DLPA004-7 is not suitable for PCIe Gen1. Its 85V VRWM is excessive for 3.3V signaling, and its 2pF per-element capacitance exceeds PCIe Gen1's 0.3pF limit. Use dedicated low-capacitance arrays like SP1002–02UTG (0.25pF) instead.
Does DLPA004-7 require external biasing or pull-up resistors?
No external biasing is required. The device operates passively: VP may be left floating for pure bidirectional clamping, or tied to VCC if positive rail clamping is needed. No pull-up/pull-down resistors are necessary - it functions as a voltage-triggered shunt without control signals.
How does DLPA004-7 perform under repeated ESD strikes?
Per DS31593 Rev. 5, DLPA004-7 maintains electrical specifications after ≥1000 IEC 61000-4-2 ±15kV contact discharges. Its robust Zener junction design ensures no parameter drift or leakage increase, validated per JEDEC high-reliability test protocols including HTOL and temperature cycling.
DLPA004-7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Steering (Rail to Rail)
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 85V
- Voltage - Breakdown (Min):
- 85V
- Voltage - Clamping (Max) @ Ipp:
- -
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- -
- Applications:
- -
- Capacitance @ Frequency:
- 2.3pF @ 1MHz
- Operating Temperature:
- -65°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-363
DLPA004-7 FAQ
1.How can I place an order for DLPA004-7 through Aetrix?
Please submit a Request for Quotation (RFQ) for DLPA004-7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DLPA004-7 reliable?
The price and inventory of DLPA004-7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DLPA004-7 is usually 5 days.
3.What payment methods are accepted for DLPA004-7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DLPA004-7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DLPA004-7?
DLPA004-7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DLPA004-7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DLPA004-7?
For technical support, including DLPA004-7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DLPA004-7 requirements.
6.How does Aetrix verify that DLPA004-7 is sourced from the original manufacturer or authorized distributors?
All DLPA004-7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DLPA004-7 meets industry standards.
7.What is the process for return or replacement of DLPA004-7?
All DLPA004-7 units undergo pre-shipment inspection (PSI). If there is an issue with DLPA004-7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DLPA004-7 part is unused and in its original packaging.
Return procedure for DLPA004-7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DLPA004-7 Tags

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Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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Toshiba Semiconductor and Storage

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