Diodes Incorporated DLPT05-7-F
- Part No.:
- DLPT05-7-F
- Manufacturer:
- Diodes Incorporated
- Category:
- TVS Diodes
- Package:
- TO-236-3, SC-59, SOT-23-3
- Datasheet:
-
DLPT05-7-F.pdf
- Description:
- TVS DIODE 5VWM 9.8VC SOT23-3
- Quantity:
- Payment:

- Shipping:

Inventory:3,530
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
DLPT05-7-F from Diodes Incorporated is a unidirectional surface-mount TVS diode designed for high-speed data line transient protection, featuring 300W peak pulse power (8×20µs), 75V peak repetitive reverse voltage (VRRM), 5V reverse standoff voltage (VRWM), and 9.8V clamping voltage at 1A. It protects USB, RS-485, CAN, and Ethernet interfaces against IEC 61000-4-2 Level 4 ESD (±30kV air/±30kV contact) and IEC 61000-4-4 EFT.
For engineers reviewing the DLPT05-7-F datasheet, DLPT05-7-F pinout, DLPT05-7-F application, or DLPT05-7-F equivalent, this device delivers low-capacitance (1.9pF), low-leakage (<20µA), and fast-response transient suppression in SOT-23 packaging - critical for signal integrity in high-speed serial interfaces.
Technical Context
The DLPT05-7-F employs a silicon avalanche diode structure optimized for low-capacitance transient clamping on bidirectional or unidirectional data lines. Its 1.9pF capacitance at 0V ensures minimal signal distortion up to 500MHz, while the 9.8V clamping voltage limits stress on downstream transceivers during 1A 8×20µs surges.
It operates across –55°C to +150°C with a thermal resistance of 417°C/W (J-A, FR-4, 2oz copper), and its SOT-23 package supports automated placement and reflow soldering per MIL-STD-202. The device is fully RoHS-compliant, halogen- and antimony-free ("Green"), and rated for moisture sensitivity level 1.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VRWM | 5 V - Maximum continuous reverse operating voltage before leakage exceeds 20 µA; sets upper limit for safe DC bias on protected line. |
| VBR (min) | 6.0 V - Breakdown begins no lower than this; ensures reliable triggering above normal signal swing. |
| VC @ IPP=1A | 9.8 V - Clamped voltage during 8×20µs surge; defines worst-case overvoltage seen by IC pin. |
| CT @ 0V, 1MHz | 1.9 pF - Total line-to-ground capacitance; enables use on USB 2.0 (480 Mbps) and CAN FD (5 Mbps) without signal degradation. |
| PPK | 300 W - Peak pulse power handling (8×20µs); sustains multiple ESD/EFT events without degradation. |
| IR @ VRWM | <20 µA - Reverse leakage at rated standoff; prevents loading of high-impedance data receivers. |
Pinout & Package
DLPT05-7-F is housed in an industry-standard SOT-23 package (JEDEC TO-236AB), measuring 2.90 mm × 1.30 mm × 1.03 mm, with matte tin-plated Alloy 42 leads and UL 94V-0 molded plastic body. Moisture sensitivity level is 1 per J-STD-020D.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode (Pin 1) | Protected Data Line Input | Connected directly to the signal line requiring ESD/EFT protection (e.g., USB D+, CAN H). |
| Cathode (Pin 2) | Power Rail / Clamp Reference | Bias point for clamping action; typically tied to VCC or local supply rail to enable unidirectional operation. |
| Ground (Pin 3) | Transient Return Path | Low-inductance connection to system ground plane; essential for effective surge current diversion. |
Key Features
| Feature | Design Value |
|---|---|
| IEC 61000-4-2 Level 4 ESD immunity | ±30 kV air discharge, ±30 kV contact discharge - meets industrial and automotive interface robustness requirements without external shielding. |
| Low 1.9 pF capacitance | Preserves signal edge rate and eye diagram integrity on 480 Mbps USB 2.0 and 5 Mbps CAN FD buses. |
| 300 W peak pulse power | Withstands repeated 8×20µs transients (e.g., lightning-induced surges on fieldbus lines) without parametric shift. |
| RoHS 3 & "Green" compliant | Contains <900 ppm Br, <900 ppm Cl, <1000 ppm Sb - satisfies strict environmental mandates for global electronics manufacturing. |
Applications
| USB 2.0 Interface Protection | RS-485 Transceiver Protection |
|---|---|
Use Scenario: Protecting host/device USB ports against user-handling ESD and cable-induced transients in industrial docking stations. IC Role / Device Role / Timing Role: Unidirectional TVS clamp between D+ line and VCC, limiting overvoltage to 9.8 V during ±8 kV contact discharge. Use Value: Prevents latch-up or damage to USB PHY transceivers while maintaining <1% signal rise-time degradation due to 1.9 pF capacitance. | Use Scenario: Safeguarding half-duplex RS-485 nodes in factory automation networks exposed to motor-switching EFT noise. IC Role / Device Role / Timing Role: Bidirectional protection (using two DLPT05-7-F devices per line) on A/B differential pair, clamping common-mode surges to <10 V. Use Value: Enables >100,000 surge cycles without parameter drift, supporting 250 kbps data rates with maintained common-mode rejection. |
| CAN FD Bus Protection | Ethernet 10/100BASE-TX Protection |
Use Scenario: Shielding automotive CAN FD gateways from battery dump and load-switch transients in 12 V systems. IC Role / Device Role / Timing Role: Anode-to-CAN_H, cathode-to-VCC, ground-to-chassis; clamps negative transients to VCC −0.7 V and positive to 9.8 V. Use Value: Maintains bit error rate <10−12 at 5 Mbps under ISO 7637-2 Pulse 1/2/5a stress due to sub-10 ns response time. | Use Scenario: Adding secondary-level surge protection on MDI pins of Ethernet PHYs in PoE-powered access points. IC Role / Device Role / Timing Role: Low-capacitance TVS on TX+/TX− and RX+/RX− pairs, referenced to isolated digital ground. Use Value: Adds IEC 61000-4-5 (10/700 µs) surge margin without violating IEEE 802.3 100BASE-TX return loss specs (≤ −12 dB @ 31.25 MHz). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar data line transient protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMAJ5.0A | Higher VRWM (5.0 V same), but larger SMA package (4.5 mm × 2.7 mm), 22 pF capacitance, 400 W PPK. | Not suitable for >10 Mbps interfaces due to excessive capacitance; better for power-rail or low-speed analog protection. | Select when board space allows and signal bandwidth <10 MHz; avoid for USB/CAN/Ethernet. |
| TPD2E001DRYR | Bi-directional dual-channel TVS, 1.5 pF per channel, VRWM = 5 V, VC = 14 V @ 1A, SOT-553 package. | Designed for USB D+/D− pair protection in single device; higher clamping voltage trades off speed for dual-line integration. | Prefer for space-constrained dual-line designs where 14 V clamping is acceptable; DLPT05-7-F offers tighter clamping for single-line critical nodes. |
Compared with SMAJ5.0A and TPD2E001DRYR, DLPT05-7-F uniquely balances ultra-low capacitance (1.9 pF), tight clamping (9.8 V), and SOT-23 footprint - making it optimal for single-line, high-speed data protection where signal fidelity and surge margin are both critical.
Availability
DLPT05-7-F is available at Aetrix Electronics and suitable for USB 2.0 interface protection, RS-485 fieldbus nodes, and CAN FD automotive gateways requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production lots.
Supply support for DLPT05-7-F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, headquartered in Plano, Texas, with design, manufacturing, and sales operations across Asia, Europe, and North America.
The DLPT series targets high-reliability transient protection for high-speed serial interfaces, emphasizing low capacitance, precise clamping, and compliance with IEC 61000-4-x standards for industrial, automotive, and communications equipment.
FAQ
What is the maximum operating temperature for DLPT05-7-F?
The DLPT05-7-F is rated for junction and storage temperatures from –55°C to +150°C. Its thermal resistance (RθJA) is 417°C/W when mounted on a standard FR-4 PCB with 2 oz copper per Diodes' AP02001 pad layout, enabling reliable operation in under-hood automotive or industrial control cabinet environments.
Can DLPT05-7-F be used for bidirectional data lines like RS-485?
Yes - DLPT05-7-F is unidirectional, but RS-485 protection is implemented using two devices per differential pair: one anode-to-A/cathode-to-VCC, another anode-to-B/cathode-to-VCC. This configuration provides symmetrical clamping for both polarities while preserving the 1.9 pF capacitance benefit on each line.
How does DLPT05-7-F compare to polymer-based ESD suppressors?
Unlike polymer ESD suppressors, DLPT05-7-F uses silicon avalanche technology, delivering deterministic clamping voltage (9.8 V), sub-nanosecond response, and stable 1.9 pF capacitance across voltage and temperature - critical for timing-sensitive high-speed interfaces where polymer devices exhibit variable impedance and higher capacitance drift.
Is DLPT05-7-F compatible with lead-free reflow profiles?
Yes - DLPT05-7-F features matte tin-plated leads over Alloy 42 and is qualified for standard lead-free reflow profiles (peak temperature ≤260°C, per JEDEC J-STD-020). Its SOT-23 package and moisture sensitivity level 1 allow direct placement into high-volume automated assembly without baking or special handling.
DLPT05-7-F Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Package/Case:
- TO-236-3, SC-59, SOT-23-3
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Steering (Rail to Rail)
- Unidirectional Channels:
- 1
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5V
- Voltage - Breakdown (Min):
- 6V
- Voltage - Clamping (Max) @ Ipp:
- 9.8V
- Current - Peak Pulse (10/1000µs):
- 17A (8/20µs)
- Power - Peak Pulse:
- 300W
- Power Line Protection:
- Yes
- Applications:
- General Purpose
- Capacitance @ Frequency:
- 1.9pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-3
DLPT05-7-F FAQ
1.How can I place an order for DLPT05-7-F through Aetrix?
Please submit a Request for Quotation (RFQ) for DLPT05-7-F on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DLPT05-7-F reliable?
The price and inventory of DLPT05-7-F are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DLPT05-7-F is usually 5 days.
3.What payment methods are accepted for DLPT05-7-F?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DLPT05-7-F transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DLPT05-7-F?
DLPT05-7-F orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DLPT05-7-F order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DLPT05-7-F?
For technical support, including DLPT05-7-F datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DLPT05-7-F requirements.
6.How does Aetrix verify that DLPT05-7-F is sourced from the original manufacturer or authorized distributors?
All DLPT05-7-F products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DLPT05-7-F meets industry standards.
7.What is the process for return or replacement of DLPT05-7-F?
All DLPT05-7-F units undergo pre-shipment inspection (PSI). If there is an issue with DLPT05-7-F, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DLPT05-7-F part is unused and in its original packaging.
Return procedure for DLPT05-7-F:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DLPT05-7-F Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

