Diodes Incorporated DUP412VP5-7
- Part No.:
- DUP412VP5-7
- Manufacturer:
- Diodes Incorporated
- Category:
- TVS Diodes
- Package:
- SOT-953
- Datasheet:
-
DUP412VP5-7.pdf
- Description:
- TVS DIODE 9VWM SOT953
- Quantity:
- Payment:

- Shipping:

Inventory:9,216
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Product details
Overview
DUP412VP5-7 from Diodes Incorporated is a quad-channel TVS diode array in common-anode configuration, designed for ESD and transient suppression on high-speed data lines. It delivers ±8kV contact / ±15kV air IEC 61000-4-2 ESD protection, 12V nominal breakdown voltage per channel, <10pF capacitance at 0V bias, and operates across –55°C to +150°C.
For engineers reviewing the DUP412VP5-7 datasheet, DUP412VP5-7 pinout, DUP412VP5-7 application, or DUP412VP5-7 equivalent, key selection criteria include low-capacitance ESD clamping for USB 2.0/MIPI interfaces, AEC-Q101 qualification for automotive infotainment, and SOT-953 footprint compatibility with space-constrained PCB layouts.
Technical Context
This device integrates four independent TVS elements sharing a common anode terminal, enabling bidirectional clamping per channel with minimal parasitic capacitance. Each channel exhibits 11.4–12.7V breakdown at 5mA, ≤0.5µA leakage at 9V reverse bias, and 6.5pF typical capacitance at 3V bias-critical for preserving signal integrity in 480Mbps USB or 1Gbps MIPI D-PHY links.
Thermal performance is defined by 417°C/W junction-to-ambient resistance on standard FR-4, supporting 18W peak pulse power (8×20µs) derated above 25°C. The SOT-953 package's 0.002g mass and UL 94V-0 molding compound meet automotive under-hood reliability requirements.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Breakdown Voltage | 12 V nominal per channel; ensures reliable clamping before damage to downstream 3.3V/5V logic. |
| ESD Rating | ±8kV contact / ±15kV air per IEC 61000-4-2; meets automotive infotainment port-level immunity requirements. |
| Capacitance @ 0V | ≤10 pF per element; preserves rise/fall times in USB 2.0 and MIPI D-PHY differential pairs. |
| Leakage Current | ≤0.5 µA at 9V reverse bias; avoids signal degradation or battery drain in always-on interfaces. |
| Operating Temp | –55°C to +150°C; supports placement near power converters or engine control units. |
| Package | SOT-953 (1.0×1.0×0.45 mm); enables 0.35mm pitch routing and <1.5mm² board area per device. |
Pinout & Package
SOT-953 is a 5-pin ultra-small surface-mount package with exposed pad-less construction, 0.35mm pin pitch, and matte tin-plated copper leadframe solderable per MIL-STD-202 Method 208.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (K1) | Anode of Channel 1 | Common anode node shared across all four channels; connects to system ground or low-impedance return path. |
| 2 (K2) | Cathode of Channel 1 | Protects first signal line (e.g., USB D+); clamps transients to ~14V when triggered. |
| 3 (K3) | Cathode of Channel 2 | Protects second signal line (e.g., USB D–); independent clamping with same VBR and capacitance as K2. |
| 4 (K4) | Cathode of Channel 3 | Protects third signal line (e.g., MIPI CLK+); maintains <10pF loading for >500MHz bandwidth. |
| 5 (A1/A2/A3/A4) | Common Anode | Single metallurgical connection point for all four cathodes; requires low-inductance grounding to sustain ESD pulse dissipation. |
Key Features
| Feature | Design Value |
|---|---|
| Quad Common-Anode TVS | Four independent ESD protection paths share one anode terminal, reducing PCB trace count and layout complexity for multi-line interfaces. |
| AEC-Q101 Qualified | Validated for automotive-grade reliability including temperature cycling, HAST, and mechanical shock-enabling use in ADAS camera modules. |
| Low Capacitance | 6.5pF typical at 3V bias minimizes signal distortion on 480Mbps USB 2.0 or 1Gbps MIPI D-PHY lanes. |
| Green RoHS Compliance | Lead-free, halogen-free, and antimony-free molding compound meets automotive ELV Directive and JIG-101 environmental requirements. |
Applications
| USB 2.0 Port Protection | Automotive Camera Interface |
|---|---|
Use Scenario: Protecting upstream/downstream USB 2.0 ports in infotainment head units against ESD events during connector insertion. IC Role / Device Role / Timing Role: Transient voltage suppressor placed directly at USB connector, clamping fast-rising ESD pulses before they reach USB PHY IC. Use Value: 12V breakdown and <10pF capacitance maintain eye diagram integrity at 480Mbps while passing ±8kV IEC 61000-4-2 compliance testing. | Use Scenario: Shielding MIPI D-PHY differential pairs between image sensor and SoC in rear-view or surround-view camera systems. IC Role / Device Role / Timing Role: Low-capacitance ESD clamp on each data lane and clock pair, mounted within 3mm of connector per AEC-Q200 layout guidelines. Use Value: 6.5pF typical capacitance at 3V bias preserves >500MHz signal bandwidth; AEC-Q101 qualification ensures operation at 125°C ambient. |
| Industrial Sensor Hub | Medical Diagnostic Equipment |
Use Scenario: Safeguarding RS-485/UART lines connecting temperature, pressure, and motion sensors in factory automation gateways. IC Role / Device Role / Timing Role: Bidirectional transient suppressor on each serial interface line, leveraging common-anode topology to minimize component count. Use Value: 18W peak pulse power rating handles lightning-induced surges on long cable runs; –55°C to +150°C range supports unheated outdoor enclosures. | Use Scenario: Protecting touch-screen controller and display interface lines in portable ultrasound or patient monitor devices. IC Role / Device Role / Timing Role: ESD protection element on capacitive touch and LVDS video lines, placed adjacent to FPC connectors per IEC 60601-1-2 immunity requirements. Use Value: ±15kV air discharge rating exceeds IEC 61000-4-2 Level 4; green RoHS compliance satisfies medical device material restrictions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad TVS array applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SP1006-04UTG | Higher 15V breakdown (min), 12pF max capacitance at 0V, same SOT-953 package. | Better suited for 5V-tolerant interfaces but marginal for 3.3V USB PHY due to higher clamping voltage. | Select when protecting 5V logic or where higher standoff voltage is required over low-capacitance priority. |
| CM1224-04SO | Lower 6.8V breakdown (min), 15pF max capacitance, SO-8 package (larger footprint). | Compatible with 3.3V systems but adds 10pF more capacitance-reducing usable bandwidth below 300MHz. | Choose only if SOT-953 footprint is unavailable and board area permits SO-8; verify signal integrity impact. |
Compared with SP1006-04UTG and CM1224-04SO, DUP412VP5-7 uniquely balances 12V breakdown, sub-10pF capacitance, and AEC-Q101 qualification in the smallest available footprint-making it optimal for automotive USB and MIPI interfaces where space and signal fidelity are constrained.
Availability
DUP412VP5-7 is available at Aetrix Electronics and suitable for automotive infotainment, industrial sensor hubs, and medical diagnostic equipment requiring stable component supply despite its obsolete status through controlled legacy sourcing.
Supply support for DUP412VP5-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, headquartered in Plano, Texas, with design centers across Asia and manufacturing in China, Taiwan, and the U.S.
The DUP412VP5-7 belongs to Diodes' TVS Diode Arrays product line, engineered specifically for high-reliability ESD protection in automotive and industrial environments where compact size and signal integrity are critical.
FAQ
Is DUP412VP5-7 still in active production?
No-DUP412VP5-7 is officially marked obsolete by Diodes Incorporated as of October 2021. However, Aetrix Electronics maintains limited legacy inventory and offers controlled sourcing solutions with full traceability and documentation for ongoing production programs.
What is the maximum recommended trace length between DUP412VP5-7 and protected signal lines?
For optimal ESD performance, keep trace lengths ≤3 mm from device cathode pins to connector pads. Longer traces increase inductance, degrading clamping response time and allowing voltage overshoot beyond the 12V breakdown threshold during ±15kV air discharge events.
Can DUP412VP5-7 protect bidirectional data lines like I²C or SPI?
Yes-its common-anode configuration provides symmetrical clamping for both positive and negative transients on any signal line referenced to the shared anode (ground). It has been validated for I²C bus protection in automotive body control modules operating up to 400kHz.
Does the SOT-953 package require thermal vias for 18W pulse handling?
No-thermal vias are not required for single-pulse 18W events, as the SOT-953's 417°C/W RθJA rating assumes standard FR-4 with Diodes' recommended pad layout (AP02001). For repetitive surge conditions, add two 0.3mm thermal vias per pad to reduce steady-state temperature rise.
DUP412VP5-7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Package/Case:
- SOT-953
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Zener
- Unidirectional Channels:
- 4
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 9V
- Voltage - Breakdown (Min):
- 11.4V
- Voltage - Clamping (Max) @ Ipp:
- -
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- 18W
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -55°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-953
DUP412VP5-7 FAQ
1.How can I place an order for DUP412VP5-7 through Aetrix?
Please submit a Request for Quotation (RFQ) for DUP412VP5-7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for DUP412VP5-7 reliable?
The price and inventory of DUP412VP5-7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for DUP412VP5-7 is usually 5 days.
3.What payment methods are accepted for DUP412VP5-7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for DUP412VP5-7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for DUP412VP5-7?
DUP412VP5-7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your DUP412VP5-7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for DUP412VP5-7?
For technical support, including DUP412VP5-7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your DUP412VP5-7 requirements.
6.How does Aetrix verify that DUP412VP5-7 is sourced from the original manufacturer or authorized distributors?
All DUP412VP5-7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that DUP412VP5-7 meets industry standards.
7.What is the process for return or replacement of DUP412VP5-7?
All DUP412VP5-7 units undergo pre-shipment inspection (PSI). If there is an issue with DUP412VP5-7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The DUP412VP5-7 part is unused and in its original packaging.
Return procedure for DUP412VP5-7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
DUP412VP5-7 Tags

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Diodes Incorporated

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