My Inquiry
My Account
onsemi ESD7002WTT1G
- Part No.:
- ESD7002WTT1G
- Manufacturer:
- onsemi
- Category:
- TVS Diodes
- Package:
- SC-70, SOT-323
- Datasheet:
-
ESD7002WTT1G.pdf
- Description:
- TVS DIODE 5VWM SC70-3
- Quantity:
- Payment:
- Shipping:
Inventory:81,137
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ESD7002WTT1G from onsemi is a unidirectional low-capacitance ESD protection diode designed for high-speed differential data lines, featuring 0.3 pF typical capacitance (I/O to GND), 16 V working peak reverse voltage, and ±8 kV IEC 61000-4-2 contact ESD protection - deployed in USB 3.0, HDMI, and LVDS interfaces to preserve signal integrity.
For engineers reviewing the ESD7002WTT1G datasheet, pinout, applications, or equivalent options, key selection criteria include sub-0.5 pF capacitance matching, clamping voltage under 34 V at 16 A TLP, 5 GHz 3dB bandwidth, and SC-70 package compatibility with high-density PCB layouts for differential pair routing.
Technical Context
The ESD7002WTT1G implements a dual-cathode, single-anode unidirectional topology in a flow-through SC-70 package, enabling matched trace lengths between differential lines. Its junction capacitance is tightly controlled (±10% matching between I/O pins) and characterized at 1 MHz with VR = 0 V.
Clamping behavior is validated per IEC 61000-4-2 (±8 kV contact) and TLP (8 A/16 A), delivering ≤33.9 V positive clamping and ≤−10.8 V negative clamping - critical for protecting 1.8 V/3.3 V transceivers without forward conduction during normal operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Capacitance (I/O to GND) | 0.3 pF typical - preserves >5 GHz signal bandwidth and minimizes insertion loss (<0.5 dB @ 5 GHz). |
| Working Peak Reverse Voltage | 16 V - supports common high-speed interface rails (USB 3.0, HDMI TMDS, LVDS) without leakage or conduction. |
| IEC 61000-4-2 ESD Rating | ±8 kV contact - meets Level 4 immunity for end-equipment compliance in consumer and industrial applications. |
| Clamping Voltage (TLP, +16 A) | 33.9 V - limits transient overvoltage to safe levels for 3.3 V IO buffers and SerDes receivers. |
| 3dB Bandwidth | 5 GHz - ensures minimal distortion of multi-Gbps differential signals (e.g., USB 3.0 5 Gb/s eye diagram integrity). |
| Junction Capacitance Matching | ±10% between I/O pins - maintains impedance balance and common-mode rejection in differential pairs. |
Pinout & Package
ESD7002WTT1G is housed in an SC-70 (SOT-323) package (Case 419, Style 4), measuring 2.2 mm × 2.2 mm × 1.1 mm, with gull-wing leads optimized for high-frequency layout and thermal dissipation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 | Cathode (I/O1) | ESD current sink path for first high-speed line; connects directly to protected signal trace. |
| Pin 2 | Cathode (I/O2) | ESD current sink path for second high-speed line; enables matched-length routing with Pin 1. |
| Pin 3 | Anode (GND) | Common low-inductance return path to system ground plane - critical for low-clamping impedance. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low capacitance | 0.3 pF typical (I/O to GND) - avoids signal degradation in 5+ Gb/s serial links. |
| Differential capacitance matching | ±10% max deviation between I/O pins - sustains common-mode noise rejection in USB/HDMI differential pairs. |
| Low clamping voltage | ≤33.9 V at +16 A TLP - protects 3.3 V transceivers without latch-up or damage. |
| AEC-Q101 qualification | Qualified for automotive infotainment and ADAS data links requiring robust ESD immunity. |
Applications
| USB 3.0 Interface Protection | HDMI TMDS Channel Protection |
|---|---|
Use Scenario: Protecting SuperSpeed differential pairs (SSTX+/−, SSRX+/−) in host/device ports against ESD events during hot-plug or handling. IC Role / Device Role / Timing Role: Unidirectional ESD clamp placed adjacent to connector, shunting transients to ground before reaching USB 3.0 PHY. Use Value: Maintains <0.5 dB insertion loss at 5 GHz and preserves eye diagram opening - verified in Figure 17 of datasheet. | Use Scenario: Safeguarding HDMI 1.4/2.0 TMDS clock and data channels (CLK+/−, DATA0+/−, etc.) from contact discharge in AV receivers and displays. IC Role / Device Role / Timing Role: Flow-through SC-70 placement enables symmetrical PCB routing to preserve 100 Ω differential impedance across all channels. Use Value: 0.3 pF capacitance prevents high-frequency roll-off; ±10% capacitance matching ensures balanced skew between differential lanes. |
| LVDS Display Interface | Automotive Camera Link (FPD-Link III) |
Use Scenario: Shielding notebook display eDP or industrial panel LVDS links (clock/data pairs) from ESD-induced bit errors or pixel corruption. IC Role / Device Role / Timing Role: Dual-cathode configuration protects both sides of each LVDS pair with shared ground return, minimizing loop area. Use Value: 5 GHz bandwidth supports >1 Gbps LVDS rates; clamping voltage <34 V avoids exceeding 1.8 V receiver absolute maximum ratings. | Use Scenario: Hardening FPD-Link III serializer/deserializer connections in automotive rear-view or surround-view cameras exposed to harsh ESD environments. IC Role / Device Role / Timing Role: AEC-Q101 qualified unidirectional diode placed at camera module connector to suppress ±8 kV contact discharges per ISO 10605. Use Value: Low leakage (<1 µA @ 5 V) prevents DC offset; SC-70 footprint allows integration in space-constrained camera modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPD2E001DRYR | 0.8 pF capacitance (I/O–GND), bidirectional, SOT-553 package, 5.5 V VRWM | Better suited for lower-speed interfaces (USB 2.0, I²C); higher capacitance limits use above 480 Mbps | Select when cost sensitivity outweighs GHz-bandwidth requirements and bidirectional protection is needed. |
| SP3203-01UTG | 0.35 pF capacitance, unidirectional, SOT-23-3 package, 12 V VRWM, ±15 kV air discharge | Higher air-gap ESD rating but lower working voltage - unsuitable for 16 V HDMI TMDS or 5 V USB 3.0 VBUS-adjacent traces | Prefer for legacy LVDS or 3.3 V-only systems where 12 V VRWM suffices and SOT-23 layout compatibility exists. |
Compared with TPD2E001DRYR and SP3203-01UTG, ESD7002WTT1G uniquely delivers 16 V VRWM with 0.3 pF capacitance in SC-70 - enabling direct deployment on 5 Gb/s USB 3.0 and HDMI 2.0 differential pairs without signal integrity compromise or voltage margin violation.
Availability
ESD7002WTT1G is available at Aetrix Electronics and suitable for USB 3.0 interface protection, HDMI TMDS channel hardening, and automotive FPD-Link III designs requiring stable component supply and long-term production continuity.
Supply support for ESD7002WTT1G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier focused on energy-efficient power, analog, sensor, and logic solutions for automotive, industrial, cloud, and consumer markets.
The ESD7002WTT1G belongs to onsemi's high-speed ESD protection diode product line, engineered specifically to safeguard multi-Gbps differential interfaces while maintaining signal fidelity and PCB layout flexibility.
FAQ
What is the exact package type and lead finish for ESD7002WTT1G?
ESD7002WTT1G uses the SC-70 (SOT-323) package, Case 419, Style 4, with Pb-free (RoHS-compliant) terminations. The marking "G" indicates Pb-free packaging, and the device is rated for 260 °C lead solder temperature for 10 seconds per J-STD-020.
Does ESD7002WTT1G support bidirectional ESD protection?
No, ESD7002WTT1G is a unidirectional ESD protection diode - configured with two cathodes (Pins 1 and 2) and one common anode (Pin 3). It conducts only during negative transients on I/O lines relative to ground, making it ideal for DC-biased high-speed interfaces like USB 3.0 and HDMI.
What is the maximum clamping voltage of ESD7002WTT1G under IEC 61000-4-2 ±8 kV contact discharge?
Per the datasheet Figures 7 and 8, ESD7002WTT1G clamps to approximately +22 V (positive pulse) and −18 V (negative pulse) during IEC 61000-4-2 ±8 kV contact discharge - measured directly across the diode terminals using the test setup in Figure 14.
Is ESD7002WTT1G qualified for automotive applications?
Yes, the SZESD7002WTT1G variant is AEC-Q101 qualified and PPAP capable. While ESD7002WTT1G itself carries the standard onsemi prefix, its identical die and SC-70 construction are used in the automotive-grade SZ version - confirming suitability for automotive infotainment and camera link applications.
How does ESD7002WTT1G achieve capacitance matching between differential lines?
ESD7002WTT1G achieves ≤±10% junction capacitance matching between Pin 1 (I/O1) and Pin 2 (I/O2) to GND by monolithic die design and precision wafer-level trimming - ensuring balanced loading on differential pairs and preserving common-mode rejection ratio (CMRR) in high-speed links.
ESD7002WTT1G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- SC-70, SOT-323
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5V
- Voltage - Breakdown (Min):
- 16.5V
- Voltage - Clamping (Max) @ Ipp:
- -
- Current - Peak Pulse (10/1000µs):
- -
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- HDMI, USB
- Capacitance @ Frequency:
- 0.3pF @ 1MHz
- Operating Temperature:
- -55°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-70-3 (SOT323)
ESD7002WTT1G FAQ
1.How can I place an order for ESD7002WTT1G through Aetrix?
Please submit a Request for Quotation (RFQ) for ESD7002WTT1G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ESD7002WTT1G reliable?
The price and inventory of ESD7002WTT1G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ESD7002WTT1G is usually 5 days.
3.What payment methods are accepted for ESD7002WTT1G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ESD7002WTT1G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ESD7002WTT1G?
ESD7002WTT1G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ESD7002WTT1G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ESD7002WTT1G?
For technical support, including ESD7002WTT1G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ESD7002WTT1G requirements.
6.How does Aetrix verify that ESD7002WTT1G is sourced from the original manufacturer or authorized distributors?
All ESD7002WTT1G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ESD7002WTT1G meets industry standards.
7.What is the process for return or replacement of ESD7002WTT1G?
All ESD7002WTT1G units undergo pre-shipment inspection (PSI). If there is an issue with ESD7002WTT1G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ESD7002WTT1G part is unused and in its original packaging.
Return procedure for ESD7002WTT1G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ESD7002WTT1G Tags
-
ESD9B5.0ST5G
onsemi
-
DESD3V3E1BL-7B
Diodes Incorporated
-
ESD5Z3.3T1G
onsemi
-
D5V0H1B2LP-7B
Diodes Incorporated
-
D5V0P1B2LP-7B
Diodes Incorporated
-
DESD5V0U1BA-7
Diodes Incorporated
-
ESD5Z5.0T1G
onsemi
-
DESD5V0U1BB-7
Diodes Incorporated
-
D12V0L1B2LP-7B
Diodes Incorporated
-
PESD2V0Y1BSFYL
Nexperia USA Inc.
-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage
-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
